Shared Source/Drain Contact Layout for Stacked FET Scaling

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Solution Overview

Problem

Nanosheet technology faces challenges in scaling down due to device interference and difficulty in forming connections to a backside power network as devices become smaller and closer together.

Innovation Solution

A semiconductor device structure with a shared source/drain contact extending through both upper and lower source/drain regions, connected by an isolation interlayer dielectric (ILD) for optimized contact formation, and independent source/drain contacts formed from both frontside and backside, with additional BEOL and backside interconnects for enhanced connectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If devices are scaled down and placed closer together, then device density and integration are improved, but device interference increases and connection formation becomes more difficult

Engineering Contradiction:
Improvedevice densityVSAvoiddevice interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a vertical dimension by forming shared source/drain contacts that extend through multiple stacked nanosheet layers. This three-dimensional contact structure allows connections to penetrate through the stacked device architecture, enabling backside power network connections while maintaining high device density in the horizontal plane without causing interference.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The contact structure is segmented into multiple independent contacts: shared source/drain contacts that extend vertically through stacked nanosheets, and independent source/drain contacts at the frontside and backside. This segmentation allows each contact type to serve specific functions, resolving the interference issue by providing dedicated connection paths.

Inventive Principle:
Principle #1Segmentation

2Productivity

If devices are scaled down and placed closer together, then device density is improved, but forming connections to backside power network becomes more difficult

Engineering Contradiction:
Improvedevice densityVSAvoidconnection formation
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The shared source/drain contacts extend in the vertical dimension through the stacked nanosheet structure, enabling direct connections to the backside power network. This vertical penetration simplifies backside connection formation compared to trying to route connections laterally through densely packed scaled-down devices.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The shared source/drain contacts serve multiple functions: they provide electrical connections for both frontside and backside access, serve as power network connections, and maintain device density. This multi-functionality simplifies the overall connection formation process by consolidating multiple requirements into a single contact structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If shared source/drain contact is formed extending through upper and lower source/drain, then contact resistance is reduced, but isolation complexity increases

Engineering Contradiction:
Improvecontact resistanceVSAvoidisolation structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The isolation structure is segmented into distinct regions: shared source/drain contacts are isolated from independent source/drain contacts using isolation ILD. This segmentation allows each contact type to be optimized independently while maintaining overall system reliability and reducing interference between different contact functions.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250359321A1Isolated shared contact for stacked field effect transistor
Publication Date: 2025.11.20 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20250359321A1 patent drawing
  • US20250359321A1 patent drawing
  • US20250359321A1 patent drawing

AI summary

According to the embodiment of the present invention, a semiconductor device comprises a first nanodevice including a plurality of first upper transistors and a plurality of first lower transistors. The first nanodevice includes a first upper source/drain and a first lower source/drain. A shared source/drain contact extends through the first upper source/drain and the first lower source/drain. An isolation interlayer dielectric (ILD) is in direct contact with at least one surface of the shared source/drain contact.