Shared Core Extension Logic for Multi-Core SIMD Utilization

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Solution Overview

Problem

Existing processors with multiple cores face challenges due to replicated SIMD execution logic and flow control logic, which consume significant die area, increase manufacturing costs, and consume excessive power, while often being underutilized.

Innovation Solution

Implementing shared core extension logic that is shared among multiple cores, reducing the need for per-core replication of large data processing units and optimizing flow control for high throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If SIMD execution logic is replicated per-core to enable parallel data processing, then processing capability is improved, but die area consumption increases significantly

Engineering Contradiction:

Improvedata processing capabilityVSAvoiddie area

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

The patent merges the SIMD execution logic from multiple cores into a shared resource. Specifically, a single SIMD execution logic unit is made accessible to multiple cores through a coordination mechanism, allowing them to share the same hardware resource instead of each core having its own dedicated unit. This reduces the total die area while maintaining parallel processing capability through coordinated access.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The shared SIMD execution logic unit serves multiple cores, making it a universal resource. The execution logic is designed to handle requests from any of the multiple cores, effectively performing multiple functions for different core units. This multi-functionality allows a single hardware instance to replace what would otherwise require multiple separate instances.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Productivity

If SIMD execution logic is replicated per-core to enable parallel data processing, then processing capability is improved, but manufacturing cost increases

Engineering Contradiction:

Improvedata processing capabilityVSAvoidmanufacturing cost

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Productivity

If SIMD execution logic is replicated per-core to enable parallel data processing, then processing capability is improved, but power consumption increases

Engineering Contradiction:

Improvedata processing capabilityVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by stationary object

Solution Approach 1:

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Adaptability or versatility

If flow control logic is replicated per-core to handle diverse usage models, then adaptability is improved, but power consumption increases

Engineering Contradiction:

Improveflow control adaptabilityVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by stationary object

Solution Approach 1:

The patent merges the flow control logic from multiple cores into a shared resource. A single flow control logic unit is made accessible to multiple cores, allowing them to share the same hardware resource for flow control operations. This reduces the total power consumption while maintaining adaptability through coordinated access and shared state management.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The shared flow control logic unit serves multiple cores, making it a universal resource for flow control operations. It is designed to handle diverse usage models and adapt to different core requirements, effectively performing multiple flow control functions for different core units while consuming less power than replicated instances.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12554495B2Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions

Publication Date: 2026.02.17 INTEL CORP

AI summary

An apparatus of an aspect includes a plurality of cores and shared core extension logic coupled with each of the plurality of cores. The shared core extension logic has shared data processing logic that is shared by each of the plurality of cores. Instruction execution logic, for each of the cores, in response to a shared core extension call instruction, is to call the shared core extension logic. The call is to have data processing performed by the shared data processing logic on behalf of a corresponding core. Other apparatus, methods, and systems are also disclosed.