Shared Counter Image Pickup Circuit for Power Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Solid-state image pickup devices employing the column AD method face challenges in reducing power consumption due to the need for multiple counters, which increases circuit area and power consumption, and shared A/D converters result in lower transmission rates and image quality issues.
Innovation Solution
An image pickup circuit with multiple circuit blocks, each containing comparing elements, a single counter, and storage units that compare pixel signals with a slope signal and store count values, allowing for reduced power consumption by sharing counters among columns and optimizing pixel signal processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple counters are provided for each column in the column AD method, then A/D conversion can be performed in parallel for every horizontal line, but power consumption and circuit area increase
Solution Approach 1:
Multiple counters are merged into a single counter that is shared across multiple columns. The counter is sequentially reused for different columns through time-division multiplexing, reducing the total number of counters from N (one per column) to 1 (shared by all columns), thereby reducing power consumption and circuit area while maintaining parallel processing capability through pipelined architecture
Solution Approach 2:
The counter operates dynamically by being selectively activated for different columns at different time periods. The counter is enabled for a first column during a first time period, then disabled and later enabled for a second column during a second time period, allowing the same hardware resource to serve multiple functions at different times
2Use of energy by moving object
If A/D converters are shared among multiple columns, then power consumption is reduced, but transmission rate decreases and image quality deteriorates
Solution Approach 1:
The pixel array is divided into multiple banks, with each bank containing multiple columns. Each bank has its own pipeline register that can independently hold count values for multiple columns. This segmentation allows the shared counter to service multiple columns within a bank without blocking other banks, maintaining high transmission rates while reducing power consumption through counter sharing
Solution Approach 2:
Pipeline registers are used to pre-store count values for multiple columns before they are read out. This preliminary action allows the counter to continue operating at high speed for subsequent columns without waiting for previous column data to be transmitted, thereby maintaining high transmission rates even with shared counter resources
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces power consumption and prevents image quality deterioration by minimizing the number of counters and optimizing signal processing, while maintaining high image quality.
Implementation Method 1
The pixel array 22 is composed of a plurality of pixels arranged in a matrix... The individual pixels 22n which are vertically aligned output sequentially a pixel signal on the basis of the output control signal supplied from the vertical scanning circuit 21... the N pixels 221 to 22N are disposed horizontally (horizontal direction). The pixels 22, (n=1, 2, . . . , N) photoelectrically convert the incident light, and output the pixel signal of a voltage corresponding to the light.
Data Source
AI summary
An image pickup circuit including a plurality of circuit blocks. Each of the plurality of circuit blocks includes a plurality of comparing elements, a single counter, and a plurality of storage units. Each of the comparing elements compares a pixel signal supplied through a vertical signal line connected to vertically aligned pixels in a plurality of pixels arranged in a matrix, and a slope signal whose voltage is changed from an initial voltage at a constant slope. The counter counts an elapsed time since a voltage of the slope signal starts to change from the initial voltage. Each of the storage units stores a count value obtained by the counter in accordance with a comparison result of the comparator, the count value corresponding to an elapsed time until the voltage of the slope signal is changed from the initial voltage to a voltage coinciding with the pixel signal.