Shared DA Converter Circuit for Faster AD/DA Signal Conversion

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Solution Overview

Problem

Existing combined AD/DA converting apparatuses require two DA converters, leading to increased circuit size and lower processing speed due to the inability to perform AD and DA conversions in parallel, resulting in longer processing times for focusing and tracking processes.

Innovation Solution

A combined AD/DA converting apparatus that includes an input signal selection circuit, a sample hold circuit, a DA converter, a comparator circuit, a sequential comparison register, a selection circuit, and a controlling unit, allowing for alternating AD and DA conversions to reduce processing time by selecting the next analog signal for AD conversion during DA conversion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a sequential comparison type AD converter is used with a combined AD/DA converting apparatus, then AD conversion can be performed, but the apparatus requires two DA converters which increases circuit size and prevents parallel processing

Engineering Contradiction:
Improveprocessing speedVSAvoidcircuit size
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent makes the DA converter inside the sequential comparison type AD converter perform dual functions: it serves both as part of the AD conversion mechanism and as the dedicated DA converter for the combined apparatus. This eliminates the need for a separate second DA converter, reducing circuit size while enabling parallel AD and DA conversions to improve processing speed

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If two DA converters are used in the combined AD/DA converting apparatus, then both AD and DA conversion functions are available, but processing time increases due to inability to perform conversions in parallel

Engineering Contradiction:
Improveconversion function availabilityVSAvoidprocessing time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent enables the DA converter to prepare and output analog signals in advance during the AD conversion process. While the AD converter is processing the current analog signal, the DA converter can already be converting the next digital signal, thus overlapping the conversion processes and reducing total processing time

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If the DA converter is shared between AD and DA conversion functions, then circuit size is reduced, but processing time increases due to sequential operation

Engineering Contradiction:
Improvecircuit sizeVSAvoidprocessing speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent ensures the DA converter operates continuously without idle time by making it work in parallel with the AD conversion process. The DA converter converts digital signals to analog signals while the AD converter simultaneously processes analog signals, maintaining continuous useful action and improving overall processing speed

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS7477173B2Combined AD/DA converting apparatus
Publication Date: 2009.01.13 SEMICON COMPONENTS IND LLC
  • US7477173B2 patent drawing
  • US7477173B2 patent drawing
  • US7477173B2 patent drawing

AI summary

A combined AD/DA converting apparatus includes an input signal selection circuit configured to select one analog signal out of a plurality of analog input signals based on an input selection signal; an input sample hold circuit configured to sample and hold the analog input signal; a DA converter configured to convert a digital signal into an analog signal; a comparator circuit configured to output a comparison signal that indicates a size relation between the analog input signal and the analog signal; a sequential comparison register configured to define sequentially each place of a digital signal stored in the register based on the comparison signal; and a selection circuit configured to output the digital signal to the DA converter when the conversion selection signal indicates AD conversion, and to output the digital input signal to the DA converter when the conversion selection signal indicates DA conversion.