Shared Parallel Data Bus for Analog Block Routing Reduction
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Solution Overview
Problem
Modern integrated circuits with multiple analog circuit blocks require extensive routing area and numerous signal wires for data transfer from a digital core to analog circuit blocks, leading to increased chip size and layout complexity due to the large number of data registers.
Innovation Solution
Implementing a shared bidirectional M-bit parallel data bus for top-level signal routing, using selection signals to reduce the number of wires needed for selecting analog circuit blocks and data registers, thereby minimizing the number of signal wires required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single digital core outputs configuration data to multiple analog circuit blocks using traditional routing, then all analog circuit blocks can be configured, but the routing area and number of signal wires increase significantly
Solution Approach 1:
Multiple separate data bus channels are merged into a single shared bidirectional data bus that serves all N analog circuit blocks. The data bus is multiplexed across time to connect to different analog circuit blocks, eliminating the need for separate dedicated routing channels for each block and significantly reducing routing area.
Solution Approach 2:
The shared bidirectional data bus serves multiple functions: it can transfer configuration data to any of the N analog circuit blocks, support both read and write operations, and be selectively connected to different blocks through multiplexing. This universal interface replaces numerous specialized routing paths.
2Reliability
If individual data wires are used for each data register to analog circuit blocks, then data transfer is direct, but the number of signal wires becomes excessively large
Solution Approach 1:
Multiple data register outputs are merged onto a single shared data bus. Instead of having separate wires for each data register connection, all data registers connect to the same bidirectional bus, which is multiplexed in time to serve different blocks. This reduces the wire count from O(N*X*M) to O(M + log2(N) + log2(X)).
Solution Approach 2:
An interface circuit acts as an intermediary between the digital core and the analog circuit blocks. This interface circuit includes a data bus controller that manages the multiplexed connections, handles data transfer protocols, and coordinates access to the shared data bus, enabling reliable data transfer with fewer wires.
3Adaptability or versatility
If numerous data registers are used to configure analog circuit blocks, then complete control is achieved, but layout complexity increases
Solution Approach 1:
The shared bidirectional data bus provides a universal communication interface that can access any data register in any analog circuit block. This single interface replaces the need for complex dedicated routing for each register, simplifying the layout while maintaining complete control functionality through software-controlled multiplexing.
Data Source
AI summary
An integrated circuit includes N analog circuit blocks, a bidirectional M-bit parallel data bus coupled to each of the N analog circuit blocks, an external data port, and an interface circuit coupled to the external data port and the bidirectional M-bit parallel data bus. Each analog block includes at most X data registers. The interface circuit includes an analog block selection output, a register selection output, and a mode selection output, each coupled to each of the N analog circuit blocks. The analog block selection output is configured to select an analog block using at most N signals. The register selection output is configured to select a register using at most X signals. The mode selection output is configured to control the direction of data flow between the analog blocks and the interface circuit on the data bus.