Shared Data Input Output Circuit for Semiconductor Memory Area Reduction
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Solution Overview
Problem
Existing semiconductor memory devices require separate write drivers and input/output sense amplifiers for each bank, leading to increased area occupation and complexity in data input/output circuits.
Innovation Solution
A data input/output circuit with an amplification unit that differentially amplifies data signals for read and write operations, and drive units that respond to these signals to minimize circuit area by sharing functions between input/output lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate write drivers and input/output sense amplifiers are provided for each bank, then data input/output operations can be performed independently in each bank, but the area occupied by the data input/output circuit increases
Solution Approach 1:
The patent merges the write driver and input/output sense amplifier functions into a single shared circuit that serves multiple banks. The amplification unit amplifies data signals from the first input/output line during read operations and data signals from the second input/output line during write operations, while the driving unit drives both input/output lines based on control signals. This consolidation eliminates the need for separate write drivers and sense amplifiers for each bank, thereby reducing the overall circuit area while maintaining independent data input/output operations across banks.
Solution Approach 2:
The shared amplification unit and driving unit are designed to perform multiple functions: they handle both read operations (amplifying data from the first input/output line) and write operations (amplifying data from the second input/output line and driving both lines). This multi-functional design allows a single circuit to replace what would traditionally require separate dedicated circuits for each bank, achieving area reduction without sacrificing operational independence.
2Adaptability or versatility
If separate write drivers and input/output sense amplifiers are provided for each bank, then each bank can be controlled independently, but the complexity of the data input/output circuit increases
Solution Approach 1:
The patent combines multiple control functions into a unified structure where the driving unit responds to control signals to drive both the first and second input/output lines. The amplification unit handles amplification for both read and write operations. This merging reduces the number of separate control paths and circuit elements, thereby reducing complexity while preserving the ability to independently control different banks through the shared circuit's response to bank-specific control signals.
3Reliability
If separate write drivers and input/output sense amplifiers are provided for each bank, then data amplification can be optimized for each bank, but manufacturing cost increases
Solution Approach 1:
The patent implements a shared amplification unit that provides data amplification for both read and write operations across multiple banks. This consolidation reduces the total number of amplification circuits required, thereby reducing manufacturing costs associated with producing and assembling multiple separate components. The shared unit maintains optimized amplification performance by using the same high-performance amplification architecture for all banks, eliminating the need to manufacture and integrate multiple separate amplification circuits.
Data Source
AI summary
A data input/output circuit includes: an amplification unit configured to generate a data signal by amplifying data of a first input/output line coupled to a bank during a read operation, and generate a driving signal by amplifying data of a second input/output line coupled to a data input/output pad during a write operation; a read driving unit configured to drive the second input/output line in response to the data signal during the read operation; and a write driving unit configured to drive the first input/output line in response to the driving signal during the write operation.