Shared Drain MOSFET Current Spreading Compensation
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Solution Overview
Problem
Current power MOSFET configurations with shared drain substrates face inaccuracies in current measurement due to current spreading, which affects the reliability of detecting current in multichannel power MOSFETs, particularly when one channel draws a significant amount of current, leading to erroneous results.
Innovation Solution
A compensation circuit is implemented using a pilot FET, an op amp, and resistors to adjust the sense current flowing to a current sense output terminal, effectively correcting for current spreading errors by modulating the impedance of a P-type FET based on the output of the op amp, which compares signals from both channels to ensure accurate current measurement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple MOSFETs are connected in parallel on a shared drain substrate to increase current capacity, then the current handling capability is improved, but current measurement accuracy deteriorates due to current spreading
Solution Approach 1:
A pilot FET is introduced as an intermediary device that mirrors the current from the power MOSFET channel. The pilot FET's current is measured through a sense resistor, and this measurement is then used to calculate the actual channel current. This intermediary approach allows accurate current measurement without directly measuring the high current in the power MOSFET channel, thereby resolving the contradiction between handling high current and maintaining measurement accuracy.
Solution Approach 2:
The patent creates a copy of the power MOSFET channel using the pilot FET, which is configured in a current mirror arrangement. The pilot FET replicates the electrical characteristics and current flow of the power MOSFET channel at a reduced scale. By measuring the current in this copied structure rather than the original high-current channel, the system achieves accurate current sensing while maintaining the ability to handle high power currents in the parallel MOSFET configuration.
2Difficulty of detecting and measuring
If a pilot FET is used to sense current in a current mirror configuration, then current sensing capability is improved, but measurement accuracy deteriorates when current spreading occurs in shared drain
Solution Approach 1:
The patent implements a feedback mechanism where the voltage drop across the sense resistor (caused by pilot FET current) is fed back through a P-type FET to compensate for current spreading effects. The P-type FET's gate voltage is controlled by this feedback signal, and it adjusts its conductivity to counteract the current spreading in the shared drain substrate. This feedback loop continuously corrects the measurement error, maintaining accuracy even when current spreading occurs.
Solution Approach 2:
The patent dynamically changes the impedance of the P-type FET based on the operating conditions. By adjusting the gate voltage of the P-type FET through the feedback mechanism, its channel resistance is modulated to compensate for varying degrees of current spreading. This parameter change allows the system to adapt to different current levels and maintain measurement accuracy across a wide operating range, resolving the contradiction between sensing capability and measurement precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The compensation circuit significantly reduces current measurement errors caused by current spreading, maintaining accuracy across varying current loads, with maximum error reduced to approximately 1% compared to 28% without compensation, while maintaining the advantages of a shared drain substrate configuration.
Implementation Method 1
The impedance of the third FET can be modulated responsive to the output of the op amp to adjust a sense current flowing to the current sense output terminal
Data Source
AI summary
Described example embodiments include an integrated circuit having a first channel area with a first FET formed in a semiconductor substrate, the substrate providing a contact to the drain. A second channel area includes a second FET formed in the semiconductor substrate. A pilot FET couples to the first FET in a current mirror configuration. A third FET has a conductivity opposite the first and second FETs and couples to the source of the pilot FET. An op amp includes an output coupled to the gate of the third FET. Signals from the drain of the second FET and the source of the pilot FET couple to the inverting input of the op amp. Signals from the source of the first FET and the drain of the first FET couple to the non-inverting input of the op amp. Methods and additional apparatus are disclosed.