Shared ECC Scrub Loop for Multi-Bank Memory Arrays

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Solution Overview

Problem

Existing memory devices face issues with memory cell degradation and data loss due to uneven usage, where certain cells wear out faster than others, and current scrubbing techniques can inhibit standard read and write operations, leading to reduced system performance and increased ECS overhead.

Innovation Solution

Implementing a shared ECC engine across multiple banks for scrubbing operations, using a separate channel and a scrub loop to allow concurrent standard data path operations, with a holding register to store and update data during background scrubbing, reducing ECS overhead and die area requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a dedicated ECC engine is allocated to each bank for scrubbing operations, then scrubbing reliability is improved, but device complexity and die area increase

Engineering Contradiction:
Improvescrubbing reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a shared ECC engine that can service multiple banks for scrubbing operations. The ECC engine is designed with universal functionality to handle error correction for any bank that needs servicing, eliminating the need for dedicated ECC engines in each bank while maintaining scrubbing reliability through on-demand error correction capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges multiple ECC engine functions into a single shared resource. By combining the error correction capabilities that would otherwise be distributed across multiple banks into one centralized ECC engine, the system reduces overall device complexity and die area while still providing comprehensive scrubbing coverage for all banks.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If scrubbing operations are performed using traditional methods, then error correction is achieved, but standard read and write operations are inhibited leading to reduced system performance

Engineering Contradiction:
Improveerror correctionVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements background scrubbing that performs error correction in advance before errors accumulate or affect normal operations. The ECC engine operates independently in the background to service banks without interrupting foreground read and write operations, ensuring error correction is completed preliminarily without impacting system performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments scrubbing operations into independent bank-level tasks that can be serviced sequentially by the shared ECC engine. This segmentation allows the ECC engine to handle one bank at a time without blocking other banks from performing standard operations, maintaining system productivity while achieving comprehensive error correction.

Inventive Principle:
Principle #1Segmentation

3Reliability

If multiple ECC engines are distributed across banks, then scrubbing capability is improved, but die area requirements increase

Engineering Contradiction:
Improvescrubbing capabilityVSAvoiddie area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent consolidates multiple distributed ECC engine instances into a single shared ECC engine. By merging the error correction functionality that would be replicated across multiple banks into one centralized unit, the system significantly reduces die area requirements while maintaining the ability to service all banks for scrubbing operations.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250383959A1Memory device using error check and scrub with shared scrub loop
Publication Date: 2025.12.18 MICRON TECHNOLOGY INC
  • US20250383959A1 patent drawing
  • US20250383959A1 patent drawing
  • US20250383959A1 patent drawing

AI summary

Systems, methods, and apparatus for memory management operations in a memory device. In one approach, each of multiple banks in a memory array includes a scrub holding register. Data is scrubbed in the background by moving data from a location in a memory array to the scrub holding register. Data in the scrub holding register is scrubbed by error correction circuitry shared by the multiple banks. Status data is recorded for any writes that occur to the array location during the scrubbing. After scrubbing is complete, some or all portions of the scrubbed data are moved back to the array location. The status data is used to identify those portions to move back.