Multi-Bit Level Shifter With Shared Enable Logic for Dual-Rail SRAM
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Solution Overview
Problem
Existing dual rail SRAM architectures face increased memory access time and leakage noise due to voltage level differences, and typical single-bit level shifters require excessive transistors for enable logic, consuming more power and area.
Innovation Solution
A multi-bit level shifter design where transistors of the enable function are shared across multiple bits, reducing the number of enable transistors required, and an enable circuit is used to process the enable signal to output a transformed signal, allowing for efficient voltage level shifting between power domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single-bit level shifter is used with enable logic, then voltage level shifting between power domains is achieved, but the number of transistors increases, consuming more power and area
Solution Approach 1:
The patent merges the enable logic functionality into the level shifter circuit itself by using the enable signal to control the switching action of the level shifter transistors. This integration eliminates the need for separate enable logic transistors, thereby reducing the total transistor count while maintaining both voltage level shifting and enable control capabilities.
Solution Approach 2:
The level shifter transistors are designed to perform multiple functions: voltage level shifting and enable control. By making the level shifter circuit universal, it can handle both the signal level conversion and the enable/disable control without requiring additional dedicated transistors for each function.
2Loss of energy
If dual rail SRAM architecture is used, then memory leakage power is reduced, but memory access time increases due to voltage level differences
Solution Approach 1:
The patent segments the memory architecture into distinct voltage domains (low voltage logic domain and high voltage memory array domain) and uses dedicated level shifters at the interfaces. This segmentation allows each domain to operate at its optimal voltage for leakage reduction while the level shifters handle the voltage conversion, thereby maintaining fast access times despite the voltage domain separation.
3Loss of energy
If voltage level differences between power domains are maintained, then leakage power is reduced, but noise increases
Solution Approach 1:
The patent introduces level shifter circuits as intermediary components between the low voltage and high voltage domains. These intermediaries provide controlled signal transitions and isolation, preventing direct coupling between domains that would cause noise while maintaining the voltage level differences necessary for leakage reduction.
Data Source
AI summary
A multi-bit level shifter that has a plurality of level shifters, each of which is configured to receive an input signal in a first voltage domain and provide a corresponding output signal in a second voltage domain. The level shifters each have an enable node. An enable circuit includes an output terminal connected to the enable node of each of the plurality of level shifters, and each of the plurality of level shifters is configured to output the corresponding output signals in response an enable signal received by the enable circuit.