Shared Flash Memory Arbitration for Multi-Master Bus Access
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Solution Overview
Problem
The high cost and complexity of using dedicated flash memory for each external component in computer platforms, such as USB Type-C and display ports, result in increased bill of materials (BOM) costs and board area requirements.
Innovation Solution
Implementing a shared flash memory solution via a serial bus, like enhanced serial peripheral interface (eSPI)/I2C/I3C, that allows multiple platform components to access flash memory using a low pin count serial interface, supporting multi-master capabilities and including a flash sharing protocol layer, arbitration protocol, and access control mechanisms to ensure concurrency, fairness, and security.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated flash memory is used for each external component, then each component has independent storage access, but BOM cost and board area increase significantly
Solution Approach 1:
Multiple flash memory devices are merged into a single shared flash device that is accessible by multiple masters through an arbitration protocol. The flash device includes multiple address spaces, each assigned to a different master, allowing simultaneous logical access while physically sharing the same hardware resource.
Solution Approach 2:
A single flash device is designed to serve multiple masters (USB type-C retimers, display port retimers, embedded controllers) simultaneously. The flash device implements a universal interface that can be accessed by different types of masters through a standardized arbitration mechanism.
2Ease of operation
If dedicated flash memory is used for each external component, then each component has direct access, but board area requirements increase
Solution Approach 1:
Multiple flash memory devices are merged into a single shared flash device that is accessible by multiple masters through an arbitration protocol. The flash device includes multiple address spaces, each assigned to a different master, allowing simultaneous logical access while physically sharing the same hardware resource.
3Reliability
If multiple flash devices are used, then each component has dedicated storage, but system complexity increases
Solution Approach 1:
An arbitration protocol acts as an intermediary between multiple masters and the shared flash device. The protocol manages access requests, grants bus master status to the appropriate master, and ensures fair and conflict-free access to the shared resource, reducing the complexity of direct multi-master interfacing.
4Quantity of substance
If shared flash memory is implemented, then BOM cost decreases, but access coordination complexity increases
Solution Approach 1:
An arbitration protocol acts as an intermediary between multiple masters and the shared flash device. The protocol manages access requests, grants bus master status to the appropriate master, and ensures fair and conflict-free access to the shared resource, reducing the complexity of direct multi-master interfacing.
Solution Approach 2:
The system dynamically assigns bus master status to different masters based on their access requests. The arbitration protocol enables flexible, real-time allocation of access rights rather than static assignment, allowing the system to adapt to varying access patterns of different masters.
Data Source
AI summary
In one embodiment, a flash sharing controller is to enable a plurality of components of a platform to share a flash memory. The flash sharing controller may include: a flash sharing class layer including a configuration controller to configure the plurality of components to be flash master devices and configure a flash sharing slave device for the flash memory; and a physical layer coupled to the flash sharing class layer to communicate with the plurality of components via a bus. Other embodiments are described and claimed.