Shared Fuse Array for Multi-Core Configuration Data
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Solution Overview
Problem
As device complexity increases, particularly with multi-core devices, the need for configuration data storage on a single die faces challenges due to real estate and power constraints, as well as the inability to store and provide sufficient configuration data efficiently with current fuse array mechanisms.
Innovation Solution
A system that includes a fuse array and random access memory (RAM) on a die, where the fuse array is programmed with compressed configuration data, allowing each core to access either the fuse array or RAM upon power-up/reset to obtain the necessary configuration data, thereby reducing the real estate and power requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a fuse array is used to store configuration data on a multi-core die, then configuration data can be provided to each core, but the real estate and power requirements become excessive
Solution Approach 1:
The patent uses a single shared fuse array that is copied or shared across multiple cores, rather than having separate fuse arrays for each core. This allows configuration data to be stored once and accessed by multiple cores, significantly reducing the total fuse array size and die real estate required while maintaining full configuration capability for each core
Solution Approach 2:
The fuse array is designed as a universal shared resource that serves multiple cores simultaneously. The same fuse array infrastructure is used by all cores on the die, making it a multi-functional component that eliminates the need for duplicate fuse arrays for each core, thereby reducing overall real estate requirements
2Quantity of substance
If a fuse array is used to store configuration data on a multi-core die, then configuration data can be provided to each core, but power consumption increases
Solution Approach 1:
By using a single shared fuse array instead of separate fuse arrays for each core, the patent reduces the total number of fuses that need to be programmed and read. This single fuse array is accessed by multiple cores, reducing the overall power consumption associated with fuse programming and reading operations while maintaining full configuration data storage capacity
Solution Approach 2:
The patent merges the configuration data storage function into a single shared fuse array that serves multiple cores, rather than having separate fuse arrays for each core. This consolidation reduces the total power consumption by eliminating redundant programming and reading operations across multiple separate fuse arrays
3Quantity of substance
If traditional fuse array mechanisms are used in multi-core devices, then configuration data can be stored, but sufficient configuration data cannot be stored efficiently
Solution Approach 1:
The patent implements a single shared fuse array that is copied or shared across multiple cores, allowing configuration data to be stored once and accessed by multiple cores. This approach efficiently increases the total configuration data storage capacity without proportionally increasing the complexity of the fuse array mechanism, as the same infrastructure serves multiple cores
Solution Approach 2:
The fuse array is designed as a universal shared resource that serves multiple cores simultaneously, making it a multi-functional component. This universality allows the same fuse array infrastructure to provide configuration data to all cores, efficiently increasing storage capacity without requiring separate complex fuse array mechanisms for each core
4Quantity of substance
If more configuration data is stored on a multi-core die, then device functionality increases, but real estate requirements increase
Solution Approach 1:
The patent uses a single shared fuse array that is copied or shared across multiple cores, allowing configuration data to be stored once and accessed by multiple cores. This approach enables significantly more configuration data to be stored on the die without proportionally increasing real estate requirements, as the same fuse array infrastructure serves multiple cores
Solution Approach 2:
The fuse array is designed as a universal shared resource that serves multiple cores simultaneously, making it a multi-functional component. This universality allows the same fuse array infrastructure to provide configuration data to all cores, enabling increased configuration data storage capacity without proportionally increasing the real estate required on the die
Data Source
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AI summary
An apparatus includes a fuse array, a random access memory (RAM), and a plurality of cores. The fuse array is disposed on a die, where the fuse array has a plurality of semiconductor fuses programmed with compressed configuration data. The RAM is disposed separately on the die. The plurality of cores is disposed separately on the die, where each of the plurality of cores is coupled to the fuse array and the RAM, and where the each of the plurality of cores accesses either the fuse array or the RAM upon power-up/reset as indicated by contents of a load data register to obtain the compressed configuration data.