Shared-Stage Gate Driving Circuit for Reduced Display Dead Space
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of a gate driver on a display panel results in increased dead space due to the high number of transistors and signal lines, affecting the display apparatus's efficiency and quality.
Innovation Solution
A gate driving circuit with N-th and N+1-th stages that share transistors and signal lines, including an inverting circuit, sensing circuits, and pull-up/down control circuits, reduces the number of transistors and signal lines, enhancing the falling time of scan, sensing, and carry signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If the gate driver is integrated on the display panel, then the gate driving function is built-in and compact, but the dead space increases due to the large number of transistors and signal lines
Solution Approach 1:
Adjacent stages (N-th and N+1-th stages) share common transistors and signal lines, including the inverting circuit, sensing circuits, and pull-up/down control circuits. This merging of resources between stages reduces the total number of components and signal lines required, thereby decreasing the dead space occupied by the integrated gate driver on the display panel.
Solution Approach 2:
The shared inverting circuit, sensing circuits, and control circuits serve multiple stages simultaneously. For example, the inverting circuit generates inverted signals for both N-th and N+1-th stages, while the sensing circuits monitor signals across stage boundaries. This multi-functionality reduces redundant components and minimizes the area required for the gate driver integration.
2Area of stationary object
If the number of transistors and signal lines is reduced through sharing, then the dead space decreases, but the circuit complexity increases due to shared components
Solution Approach 1:
The gate driver is divided into multiple stages (N-th stage, N+1-th stage, etc.), each with clearly defined functions and boundaries. While adjacent stages share certain circuits, each stage maintains its own scan signal generation, output, and control logic. This segmentation provides a modular structure that simplifies the overall design and reduces complexity compared to a fully integrated approach without clear stage divisions.
3Quantity of substance
If stages share inverting circuits and sensing circuits, then the number of signal lines is reduced, but the signal timing and control complexity increases
Solution Approach 1:
The inverting circuits are configured to generate inverted signals in advance for both current and next stages. The sensing circuits are positioned to detect signals before they are fully processed, allowing early identification of signal states. This preliminary action enables the shared circuits to properly coordinate signals across stage boundaries without requiring complex real-time timing control.
Data Source
AI summary
Provided is a gate driving circuit comprising an N-th stage and an N+1-th stage. The N-th stage outputs an N-th scan gate signal based on an N-th scan clock signal, a voltage of a QN node, and a voltage of a QBN node and to output an N-th carry signal based on an N-th carry clock signal, the voltage of the QN node, and the voltage of the QBN node. The N+1-th stage outputs an N+1-th scan gate signal based on an N+1-th scan clock signal, a voltage of a QN+1 node, and the voltage of the QBN node and an N+1-th carry signal based on an N+1-th carry clock signal, the voltage of the QN+1 node, and the voltage of the QBN node. The N-th stage and the N+1-th stage share an inverting circuit. The inverting circuit controls the QBN node based on a third signal. N is a positive integer.