Shared Global Shutter Image Sensor Array Transistor Reduction
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Solution Overview
Problem
Current CMOS global shutter image sensor arrays consume a large number of transistors per pixel, leading to challenges in achieving an acceptable fill factor and signal-to-noise ratio, particularly for applications requiring small pixel sizes.
Innovation Solution
The implementation of an image sensor array with a global shutter shared by multiple pixels, including a charge storage area and an opaque shield, which reduces charge buildup and allows for simultaneous or sequential transfer and readout of charges, enabling configurations such as rolling reset, 2x2 binning global shutter, and 1x4 binning global shutter to optimize pixel readout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a global shutter is provided for each pixel in a CMOS image sensor array, then motion blur is reduced and image capture quality is improved, but the number of transistors per pixel increases significantly
Solution Approach 1:
Multiple pixels share a common global shutter circuit, merging the shutter function across several pixel elements. This reduces the total transistor count per pixel while maintaining global shutter capabilities for motion-freeze functionality.
Solution Approach 2:
The shared global shutter circuit serves multiple pixels simultaneously, making the shutter mechanism universal rather than dedicated to each individual pixel. This multi-functional approach reduces overall device complexity.
2Quantity of substance
If the pixel size is reduced to increase array density, then more pixels can be packed into the sensor, but the fill factor and signal-to-noise ratio deteriorate
Solution Approach 1:
Adjacent pixels are combined to share common circuitry including the global shutter, charge storage areas, and readout amplifiers. This merging allows smaller individual pixel sizes while maintaining adequate signal processing capabilities through the shared infrastructure.
Solution Approach 2:
The patent organizes pixels into groups or blocks that share resources, effectively adding a hierarchical dimension to the pixel architecture. This allows dense packing at the pixel level while maintaining functional completeness at the group level.
3Measurement precision
If a large number of transistors are allocated per pixel to maintain global shutter functionality, then motion blur is reduced, but the fill factor decreases
Solution Approach 1:
The global shutter circuitry, charge storage areas, and readout amplifiers are shared among multiple pixels, dramatically reducing the area dedicated to these functions per individual pixel. This enables larger photodetector areas and higher fill factors while maintaining global shutter functionality.
Solution Approach 2:
The sensor is segmented into groups of pixels that share common infrastructure. This segmentation allows the heavy circuitry to be distributed rather than replicated at each pixel, freeing up area for light-sensitive elements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of transistors per pixel, increases the fill factor, and enhances the signal-to-noise ratio, facilitating improved image capture with reduced motion blur and increased decoding performance for indicia reading applications.
Implementation Method 1
a first pixel and a second pixel of the first set of adjacent pixels share a first common global shutter having a first charge storage area
Data Source
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AI summary
There is set forth herein in one embodiment an image sensor array including a global shutter shared by first and second pixels. The global shutter can include a charge storage area having an associated shield for reducing charge build up on the charge storage area attributable to incident light rays. There is set forth herein in one embodiment an imaging apparatus having one or more configuration. The one or more configuration can include one or more of a configuration wherein a frame read out from an image sensor array has unbinned pixel values, a configuration wherein a frame read out from an image sensor array has binned pixel values corresponding to an MxN, M>=2, N>=2 arrangement of pixel values, and a configuration wherein a frame read out from an image sensor array has binned pixel values corresponding to a 1xN, N>=2 arrangement of pixel values.