Shared GPIO Oscillator Power Switching Without Extra Package Pins
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Solution Overview
Problem
Microcontrollers face challenges in providing a regulated power supply to external crystal oscillators without dedicating a package pin, which compromises GPIO flexibility and increases complexity and cost, especially in applications where the oscillator is not always required or powered.
Innovation Solution
A processing system with an oscillator management circuit that includes a shared General Purpose Input/Output (GPIO) node for coupling an external crystal oscillator, an internal voltage regulator, and digital/analog circuits, allowing selective coupling of these components to a common input/output node using software and hardware controls to manage power and data connections without additional pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dedicated package pin is used for regulated power supply to external crystal oscillator, then the oscillator can be reliably powered, but the GPIO flexibility is reduced and package pin count increases
Solution Approach 1:
The patent makes the GPIO node universal by enabling it to serve multiple functions: general-purpose digital I/O, analog output, and regulated power supply connection for external crystal oscillator. The system dynamically configures the GPIO node's function based on operational mode, allowing the same physical node to be used for different purposes without requiring dedicated pins for each function.
Solution Approach 2:
The patent implements dynamic configuration of the GPIO node through control logic that switches between different operational modes (digital output, analog output, regulated power supply). This dynamic reconfiguration allows the system to adapt the GPIO node's function based on real-time requirements, resolving the contradiction between dedicated power supply reliability and GPIO flexibility.
2Reliability
If a dedicated package pin is used for regulated power supply to external crystal oscillator, then the oscillator can be reliably powered, but the package complexity and cost increase
Solution Approach 1:
The patent reduces package complexity by making the GPIO node universal, allowing it to serve as a regulated power supply connection without requiring a dedicated package pin. The same GPIO node is used for multiple functions including general-purpose I/O and regulated power supply, thereby simplifying the package structure and reducing pin count while maintaining reliability.
Solution Approach 2:
The patent merges the regulated power supply function with the GPIO node, combining what would traditionally be separate dedicated functions into a single multi-functional node. This merging approach reduces the number of required package pins and simplifies the overall package complexity while maintaining the reliability of oscillator power supply.
3Device complexity
If GPIO node is shared for multiple functions, then package pin count is reduced, but electrical contention may occur on the shared node
Solution Approach 1:
The patent prevents electrical contention on the shared GPIO node through dynamic configuration controlled by control logic. The system switches the GPIO node between different operational modes (digital output, analog output, regulated power supply) based on real-time requirements, ensuring that only one function is active at a time. This dynamic switching eliminates simultaneous conflicting electrical states that would cause contention.
Solution Approach 2:
The patent implements feedback control through control logic that monitors the operational state and configures the GPIO node accordingly. The control logic receives feedback about which function is needed and adjusts the GPIO node's configuration to prevent electrical contention, ensuring safe sharing of the node across multiple functions without simultaneous conflicting operations.
Data Source
AI summary
An integrated circuit includes a clock control circuit coupled to a reference clock signal node and a plurality of circuits including a voltage regulator, a digital circuit, and an analog circuit. The voltage regulator, in operation, supplies a regulated voltage. The clock control circuit, in operation, generates a system clock. Input/output interface circuitry is coupled to the plurality of circuits and a common input/output node. The input/output interface circuitry, in operation, selectively couples one of the plurality of circuits to the common input/output node.


