Shared HBA Memory and Battery Backup via PCIe
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Solution Overview
Problem
Current PCIe-based Host Bus Adapter (HBA) systems with RAID On Chip (ROC) memory require separate DDR3 memory and battery backup on each board, leading to increased cost and complexity due to replication of components across multiple HBAs.
Innovation Solution
Implementing a shared DDR3 memory and backup battery across multiple PCIe-based HBAs, allowing the memory and battery to be consolidated and accessed via PCIe interfaces, reducing the need for redundant components on each board.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate DDR3 memory and battery backup are implemented on each HBA board, then reliability and data retention during power loss are improved, but system cost and complexity increase due to component replication
Solution Approach 1:
The patent consolidates separate DDR3 memory and battery backup components from multiple HBA boards into a single shared memory resource. One HBA board hosts the common DDR3 memory chip and battery, while other HBAs access this shared memory through PCIe interfaces, eliminating the need for redundant memory and battery components on each board while maintaining data retention capability during power loss.
Solution Approach 2:
The shared DDR3 memory and battery backup system serves multiple HBA boards simultaneously. The common memory resource can be accessed by any number of PCIe-based HBAs in the system, providing universal backup capability across the entire HBA subsystem rather than dedicating separate memory to each individual board.
2Reliability
If separate DDR3 memory and battery backup are implemented on each HBA board, then data retention during power loss is ensured, but manufacturing cost and board space increase
Solution Approach 1:
The patent consolidates separate DDR3 memory and battery backup components from multiple HBA boards into a single shared memory resource. One HBA board hosts the common DDR3 memory chip and battery, while other HBAs access this shared memory through PCIe interfaces, eliminating the need for redundant memory and battery components on each board while maintaining data retention capability during power loss.
3Device complexity
If redundant memory and battery components are removed, then cost and complexity are reduced, but data retention capability during power loss may be compromised
Solution Approach 1:
The PCIe interface acts as an intermediary mechanism that enables non-host HBAs to access the shared DDR3 memory on the host HBA. This intermediary connection ensures that all HBAs in the system can reliably access and retain data in the common memory resource, maintaining data retention capability without requiring physical battery and memory components on each board.
Data Source
AI summary
The present disclosure includes methods and systems that share memory located on one PCIe based HBA across other PCIe based HBAs in the system. In addition, the backup battery is effectively shared across multiple PCIe based HBAs in the system. This approach saves significant costs by avoiding the need to have a separate DRAM with its own dedicated battery backup on each HBA board in the system. This also allows the redundant memory and backup batteries to be removed while still retaining the same functionality through the common DDR3 memory chip and battery backup shared across multiple HBAs in the system. The component cost for batteries and memory, management module, board space, and the board manufacturing cost are all reduced as a result.