Shared IC Sensor Threshold Isolation Across Security and Safety Cores
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Solution Overview
Problem
Conventional ICs face challenges in ensuring security and environmental monitoring under varying conditions, particularly in achieving FIPS140-3 certification, as unauthorized software can alter threshold settings, compromising system integrity and safety.
Innovation Solution
Implementing multiple thresholds for a single sensor, managed by different actors (security, system, and safety cores) with exclusive control over their respective threshold registers, using hardware filters to ensure secure access and dynamic or fixed threshold settings based on core roles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single sensor is shared between multiple cores, then resource utilization is optimized and die area is reduced, but access control and security management become more complex
Solution Approach 1:
The patent segments the sensor's threshold registers into multiple separate register sets, with each register set dedicated to a specific core or function (security, system, safety). This segmentation allows each core to have exclusive access to its designated registers while sharing the physical sensor resource, thereby reducing access control complexity while maintaining high resource utilization.
2Adaptability or versatility
If threshold settings are made accessible to multiple software tasks, then system flexibility is improved, but security is compromised as unauthorized tasks can alter thresholds
Solution Approach 1:
The patent divides threshold management into separate register sets for different cores (security core, system core, safety core), with each core having exclusive write access to its own registers. This segmentation maintains system flexibility by allowing each core to independently manage its thresholds while ensuring security through hardware-enforced access control that prevents unauthorized modification.
Solution Approach 2:
The patent introduces hardware access filters as intermediaries between software tasks and threshold registers. These filters act as mediators that enforce access policies, allowing legitimate threshold modifications by authorized cores while blocking unauthorized access attempts, thus maintaining both flexibility and security.
3Reliability
If separate sensors are allocated to different security domains, then security isolation is improved, but die area and resource utilization deteriorate
Solution Approach 1:
The patent merges multiple logical sensor instances into a single physical sensor resource. By implementing multiple threshold register sets within one sensor, the system achieves security isolation equivalent to separate sensors while reducing die area and improving resource utilization. Each core domain maintains isolated control over its designated registers.
Solution Approach 2:
The patent makes the single sensor universal by enabling it to serve multiple cores and functions simultaneously through its multiple register sets. This multi-functionality allows the sensor to provide security monitoring, system monitoring, and safety monitoring capabilities while maintaining proper isolation between domains, thereby reducing the need for separate dedicated sensors.
4Reliability
If hardware access filters are implemented for each threshold register, then access security is improved, but device complexity increases
Solution Approach 1:
The patent implements a universal hardware access filter mechanism that serves all threshold registers across multiple cores. Rather than creating complex specialized filters for each register, a single multi-functional filter design handles access control for all registers, simplifying the overall hardware complexity while maintaining strong access security.
Data Source
AI summary
Systems and methods for sharing a sensor between different actors in an Integrated Circuit (IC) are discussed. In some embodiments, an electronic circuit may include: first and second cores; and a sensor coupled to the first and second cores, the sensor comprising: (a) a first threshold register coupled to a first hardware access filter, where the first hardware access filter allows the first core to access the first threshold register to the exclusion of the second core, and (b) a second threshold register coupled to second hardware access filter, where the second hardware access filter allows the second core to access the second threshold register to the exclusion of the first core.