Shared I/O Memory Architecture for Parallel Bank Read/Write
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Solution Overview
Problem
As the number of bitcells in an integrated circuit memory increases, the length of word lines and bit lines also increases, leading to degraded memory speed due to excessive capacitance, and dividing the bitcells into banks with individual I/O circuits for each bank occupies significant semiconductor die space.
Innovation Solution
Implementing a shared I/O circuit with a shared read and write path for pairs of banks, allowing simultaneous read and write operations, thereby reducing die space while maintaining high-speed performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If bitcells are divided into banks with individual I/O circuits for each bank, then memory speed is maintained by reducing word line and bit line lengths, but semiconductor die space is significantly occupied
Solution Approach 1:
The patent merges the I/O circuits of multiple banks by sharing column multiplexers and write drivers. Specifically, a first column multiplexer serves both a first bank and a second bank, and a shared write driver supplies write signals to both banks. This consolidation reduces the number of discrete I/O circuits required, thereby reducing semiconductor die space while maintaining the banked architecture that preserves memory speed.
Solution Approach 2:
The column multiplexers and write drivers are designed to serve multiple banks simultaneously. The first column multiplexer can select columns from either the first bank or the second bank based on control signals, and the shared write driver can drive write operations to either bank. This multi-functional design allows a single circuit component to perform the functions that would traditionally require separate dedicated circuits for each bank.
2Area of stationary object
If a shared I/O circuit is implemented for multiple banks, then semiconductor die space is reduced, but memory speed may be degraded due to shared path contention
Solution Approach 1:
The shared I/O circuit incorporates dynamic control mechanisms including bank-specific control signals and timing control logic that adaptively manage access to shared resources. The column multiplexer dynamically switches between banks based on active operations, and the write driver dynamically adjusts its output based on which bank is currently being accessed. This dynamic management prevents contention and ensures that shared circuit components can serve multiple banks without degrading performance.
Solution Approach 2:
The patent enables parallel write operations to multiple banks simultaneously through the shared write driver, which can drive multiple banks in parallel without sequential delays. The continuous availability of the shared write driver to multiple banks ensures that write operations can proceed without interruption or waiting, maintaining high throughput and memory speed despite the shared architecture.
Data Source
AI summary
A memory is provided with a pair of banks including a first bank of bitcells and a second bank of bitcells. An I/O circuit for the pair of banks includes a shared write path configured to couple a write driver input signal to the first bank of bitcells responsive to an assertion of a write enable signal for the first bank of bitcells and to couple the write driver input signal to the second bank of bitcells responsive to an assertion of a write enable signal for the second bank of bitcells. The I/O circuit also includes a shared read path configured to couple a data bit output signal from the first bank of bitcells to a sense amplifier responsive to a de-assertion of the write enable signal for the first bank of bitcells and to couple a data bit output signal from the second bank of bitcells to the sense amplifier responsive to a de-assertion of the write enable signal for the second bank of bitcells. The shared read and write paths are further configured to operate simultaneously so that a write operation to one of the banks may occur while a read operation occurs to another one of the banks.