Shared Digital Correction in I/Q A/D Converters for Smaller IC Area
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor integrated circuit devices require multiple A/D converters and digital correction units, leading to increased design complexity, cost, and power consumption, as well as larger area occupation, due to the need for separate units for high-speed and high-accuracy analog-to-digital conversion.
Innovation Solution
A semiconductor integrated circuit device configuration that includes a single A/D converter for I signal and another for Q signal, with shared digital correction units, allowing for foreground correction and reduced area and power consumption by eliminating the need for additional large-area circuits for calculating correction coefficients.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate A/D converters are provided for high-speed and high-accuracy conversion, then conversion speed and accuracy are improved, but device area and power consumption increase
Solution Approach 1:
The patent merges the high-speed A/D converter and high-accuracy A/D converter into a single integrated device. The converter includes both a high-speed conversion path and a high-accuracy conversion path within one device structure, allowing simultaneous achievement of speed and accuracy while reducing overall device area compared to separate converters.
Solution Approach 2:
The A/D converter is designed with multi-functionality to perform both high-speed conversion and high-accuracy conversion modes. The device can selectively operate in different conversion modes depending on the application requirements, making it a universal converter that replaces multiple specialized converters.
2Speed
If separate A/D converters are provided for high-speed and high-accuracy conversion, then conversion speed and accuracy are improved, but power consumption increases
Solution Approach 1:
The patent combines high-speed and high-accuracy conversion functions into a single A/D converter device with shared power supply and control circuits. This merging reduces redundant power consumption while maintaining both high-speed and high-accuracy conversion capabilities through selective mode operation.
Solution Approach 2:
The converter employs dynamic operation modes that can switch between high-speed mode and high-accuracy mode based on real-time requirements. This dynamic operation allows the device to consume only the necessary amount of power for the current conversion task, avoiding continuous high power consumption even when high accuracy is not required.
3Productivity
If multiple A/D converters are provided, then conversion performance is improved, but design complexity increases
Solution Approach 1:
The patent integrates multiple conversion functions (high-speed and high-accuracy) into a single A/D converter with unified control logic and shared supporting circuits. This integration simplifies the overall system design while maintaining high conversion performance through internal functional differentiation.
4Measurement precision
If additional circuits for calculating correction coefficients are provided, then conversion accuracy is improved, but device area increases
Solution Approach 1:
The correction coefficient calculation circuits are merged into the main A/D converter body rather than being implemented as separate external circuits. This integration reduces the overall device area while maintaining the accuracy improvement benefits of digital correction.
Solution Approach 2:
The correction coefficients are calculated and stored in advance in memory circuits within the converter. This preliminary calculation allows the main conversion process to use pre-computed correction values, reducing the need for complex real-time calculation circuits during operation and thereby reducing device area.
Data Source
AI summary
A semiconductor integrated circuit device having A/D converters for converting, by means of digital correction processing, analog input signals into digital signals is reduced in area. The semiconductor integrated circuit device has a first A/D converter and a second A/D converter. In a first mode, a first test signal is inputted to both the first and second A/D converters, and a first correction coefficient for the first A/D converter and a second correction coefficient for the second A/D converter are calculated. In a second mode, the first A/D converter converts a first analog signal into a first digital signal by subjecting the first analog signal to a first digital correction processing and the second A/D converter converts a second analog signal into a second digital signal by subjecting the second analog signal to a second digital correction processing.