Shared LC VCO Clocking Across IC Cores to Cut Power and Die Area
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Solution Overview
Problem
Integrated circuits used in wireless communication systems face challenges in reducing power consumption and die area, particularly in generating high-quality clock signals for multiple cores, as existing voltage-controlled oscillators (VCOs) consume significant power and occupy large space, especially when multiple gigahertz frequencies are required.
Innovation Solution
The method involves sharing a clock signal generated by an inductor-capacitor voltage-controlled oscillator (LC VCO) between cores on an integrated circuit, where the GPS core generates a GPS clock signal that is reused by other cores like Wi-Fi, FM transceiver, cellular, and Bluetooth cores, eliminating the need for dedicated VCOs in these cores and utilizing delay locked loop based inphase/quadrature generators and ring voltage-controlled oscillator based phase locked loops to maintain signal quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If each core has its own dedicated voltage-controlled oscillator (VCO), then each core can generate high-quality clock signals independently, but power consumption and die area increase significantly
Solution Approach 1:
The GPS core's VCO is designed to serve multiple functions: it generates clock signals for GPS operations and simultaneously provides clock signals to other cores (Wi-Fi, FM transceiver, cellular, Bluetooth) through a shared clock distribution network. This multi-functional design eliminates the need for separate VCOs in each core, reducing overall power consumption while maintaining signal quality through proper phase synchronization.
Solution Approach 2:
The patent merges the clock generation function across multiple cores by having the GPS core's VCO serve as a common clock source for all other cores. Instead of each core having its own VCO, the system combines clock generation into a single location and distributes the clock signal through shared infrastructure, thereby reducing redundant power consumption.
2Reliability
If each core has its own dedicated voltage-controlled oscillator (VCO), then each core can generate high-quality clock signals independently, but die area occupied increases
Solution Approach 1:
The GPS core's VCO is designed to serve multiple functions: it generates clock signals for GPS operations and simultaneously provides clock signals to other cores (Wi-Fi, FM transceiver, cellular, Bluetooth) through a shared clock distribution network. This multi-functional design eliminates the need for separate VCOs in each core, reducing overall die area while maintaining signal quality through proper phase synchronization.
Solution Approach 2:
The patent merges the clock generation function across multiple cores by having the GPS core's VCO serve as a common clock source for all other cores. Instead of each core having its own VCO, the system combines clock generation into a single location and distributes the clock signal through shared infrastructure, thereby reducing redundant die area occupation.
3Use of energy by moving object
If a shared clock signal is used between cores, then power consumption and die area are reduced, but signal quality and reliability may be compromised
Solution Approach 1:
The patent introduces an intermediary mechanism (phase synchronization through delay locked loops and inphase/quadrature generators) between the shared clock source and individual cores. This intermediary ensures that while cores share the same VCO, each core receives properly synchronized and phase-aligned clock signals, thereby maintaining signal quality and reliability despite the shared architecture.
Solution Approach 2:
The system employs feedback mechanisms through delay locked loops that continuously monitor and adjust phase alignment of shared clock signals delivered to different cores. This feedback ensures that even though cores share a common VCO, each core receives clock signals with correct phase relationships, maintaining signal integrity and operational reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and die area by eliminating redundant VCOs, while maintaining signal reliability and quality, thereby extending battery life and reducing manufacturing costs.
Implementation Method 1
an inductor-capacitor voltage controlled oscillator
Data Source
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AI summary
An integrated circuit is described. The integrated circuit includes a global positioning system core that generates a GPS clock signal using an inductor-capacitor voltage controlled oscillator. The integrated circuit also includes a transceiver core configured to use the GPS clock signal. The transceiver core may not include a voltage controlled oscillator.