Shared Logic Circuitry for Parallel SHA-256 Mining Cores
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Solution Overview
Problem
The high cost and inefficiency of dedicated circuitry for Bitcoin mining due to the difficulty of cryptographic puzzles, which requires expensive design and operation.
Innovation Solution
An integrated circuit with multiple processing cores and shared logic circuitry that completes cryptographic functions in parallel, such as the Secure Hash Algorithm 256 (SHA-256) for Bitcoin mining, reducing chip area consumption and power usage by sharing logic between cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dedicated circuitry is used for Bitcoin mining, then mining capability is improved, but cost and chip area consumption increase
Solution Approach 1:
The patent merges multiple processing cores onto a single integrated circuit chip, allowing them to share common logic circuitry such as memory interfaces and control units. This consolidation enables parallel cryptographic processing while reducing overall chip area compared to separate dedicated circuits for each processor.
Solution Approach 2:
The integrated circuit is designed with universal processing cores that can perform multiple cryptographic functions beyond Bitcoin mining, including other proof-of-work algorithms. The shared logic circuitry supports various hashing algorithms, making the chip adaptable to different cryptocurrency protocols and reducing the need for specialized dedicated circuitry.
2Productivity
If dedicated circuitry is used for Bitcoin mining, then mining capability is improved, but operation cost increases
Solution Approach 1:
The patent merges multiple processing cores onto a single integrated circuit chip, allowing them to share common logic circuitry such as memory interfaces and control units. This consolidation enables parallel cryptographic processing while reducing overall chip area compared to separate dedicated circuits for each processor.
Solution Approach 2:
The integrated circuit is designed with universal processing cores that can perform multiple cryptographic functions beyond Bitcoin mining, including other proof-of-work algorithms. The shared logic circuitry supports various hashing algorithms, making the chip adaptable to different cryptocurrency protocols and reducing the need for specialized dedicated circuitry.
3Productivity
If multiple processing cores are used for parallel cryptographic processing, then mining efficiency is improved, but logic circuitry complexity increases
Solution Approach 1:
The patent segments the cryptographic processing into distinct processing cores, each handling specific portions of the search space. The logic circuitry is divided into shared components (memory interfaces, control units) and core-specific components (hashing logic), allowing parallel operation while managing complexity through modular architecture.
Solution Approach 2:
The patent merges multiple processing cores onto a single integrated circuit chip, allowing them to share common logic circuitry such as memory interfaces and control units. This consolidation enables parallel cryptographic processing while reducing overall chip area compared to separate dedicated circuits for each processor.
Data Source
AI summary
An integrated circuit may be provided with cryptocurrency mining capabilities. The integrated circuit may include control circuitry and a number of processing cores that complete a Secure Hash Algorithm 256 (SHA-256) function in parallel. Logic circuitry may be shared between multiple processing cores. Each processing core may perform sequential rounds of cryptographic hashing operations based on a hash input and message word inputs. The control circuitry may control the processing cores to complete the SHA-256 function over different search spaces. The shared logic circuitry may perform a subset of the sequential rounds for multiple processing cores. If desired, the shared logic circuitry may generate message word inputs for some of the sequential rounds across multiple processing cores. By sharing logic circuitry across cores, chip area consumption and power efficiency may be improved relative to scenarios where the cores are formed using only dedicated logic.


