Shared-Logic Gate Driver for Narrow-Bezel Display Scanning
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display devices face challenges in reducing the bezel area due to complex circuit configurations of gate drivers, which complicate the driving scheme and increase the size of elements, making it difficult to achieve a larger display area with reduced volume and weight.
Innovation Solution
A gate driver that outputs both a first and second scan signal in a single stage, utilizing a shared logic unit for both signals, and incorporates an n-type transistor to simplify the circuit configuration and reduce the bezel area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the gate driver uses a complex circuit configuration to drive multiple sub-pixels, then the driving capability is improved, but the bezel area increases
Solution Approach 1:
The patent merges the first output unit and second output unit into a single shared logic unit. The logic unit generates both first scan signals and second scan signals using common transistors (first through fifth transistors) and shared signal lines, eliminating the need for separate independent driving circuits. This consolidation directly reduces the gate driver area while maintaining the capability to drive multiple sub-pixels with different scanning schemes.
Solution Approach 2:
The logic unit is designed with multi-functionality to perform both first scan signal output and second scan signal output operations. The same transistors and logic circuits that would traditionally be dedicated to one function now serve multiple purposes, generating different scan signals based on control inputs. This universal design reduces redundant circuitry and minimizes the overall gate driver footprint.
2Reliability
If separate output units are used for first scan signal and second scan signal, then signal output reliability is improved, but device complexity increases
Solution Approach 1:
The patent combines multiple output functions into a single integrated logic unit while maintaining distinct output terminals for first scan signals and second scan signals. The shared transistors and logic circuits are controlled through different signal paths and control nodes, ensuring that each output maintains its functional independence and reliability while sharing common hardware resources.
3Adaptability or versatility
If more elements are added to the gate driver to support complex driving schemes, then the driving flexibility is improved, but the manufacturing cost increases
Solution Approach 1:
The logic unit is designed as a universal circuit that can generate multiple types of scan signals (first scan signals and second scan signals) using the same set of transistors and logic elements. This multi-functional design reduces the total number of elements required compared to having separate dedicated circuits for each scan signal type, thereby simplifying the manufacturing process and reducing production costs while maintaining driving flexibility.
Data Source
AI summary
According to an aspect of the present disclosure, there is provided a gate driver and a display device. The display device includes: a display panel having a plurality of sub-pixels defined thereon, the sub-pixels being connected to a plurality of scan lines; and a gate driver comprising a plurality of stages for supplying first and second scan signals to each of the plurality of scan lines. Each of the plurality of stages may include: a first output unit for outputting the first scan signal; a second output unit for outputting the second scan signal; a logic unit connected to the first output unit and the second output unit; a low-clock signal line connected to the logic unit; and a high-clock signal line connected to the second output unit. Therefore, a first and a second scan signal can be output from a single stage, so that the structure of the gate driver can become simpler.