Countermeasure Circuits Using Shared Logic Against Power Analysis
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Power analysis methods are used to extract sensitive information from semiconductor integrated circuit devices by correlating power consumption or electromagnetic radiation with data values, posing a threat to hardware security devices.
Innovation Solution
The circuit is divided into combinational logic groups with shared input bit groups distributed across these groups, using control gates and delayed clock signals to ensure that each group processes less than the total input bit groups, obfuscating secret information from external detection and preventing data leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If power analysis methods are used to extract sensitive information, then data can be recovered from power traces, but this creates a security vulnerability that allows attackers to obtain cryptographic keys and other sensitive information
Solution Approach 1:
The circuit divides sensitive computational operations into multiple segments or shares, where each segment processes only a portion of the secret data. This segmentation ensures that no single power trace reveals complete information about the secret, as the sensitive data is distributed across multiple circuit portions that each consume power independently.
Solution Approach 2:
The patent introduces intermediary elements such as random masks or dummy operations that interfere with the direct correlation between power consumption and secret data. These intermediaries act as mediators that decouple the relationship between the sensitive information being processed and the observable power traces, making it difficult for attackers to extract secrets through power analysis.
2Reliability
If hardware countermeasures are implemented to protect against power analysis attacks, then security is improved, but circuit complexity and computational overhead increase
Solution Approach 1:
The circuit employs dynamic switching mechanisms that randomly change the computational path or operation sequence based on control signals. This dynamic behavior ensures that the same secret data can be processed through different circuit configurations, making power traces inconsistent and unusable for traditional power analysis attacks, while maintaining relatively simple circuit structures.
Solution Approach 2:
The patent implements periodic insertion of dummy operations or random computational steps interspersed with actual secret processing operations. This periodic action creates a rhythm of power consumption that masks the correlation between power traces and secret data, achieving security enhancement without requiring fundamentally complex circuit redesign.
Data Source
AI summary
Embodiments of the present disclosure include countermeasure circuit techniques for cyberattacks. In one embodiment, portions of combinational logic receive shared input bit groups and produce shared output bit groups. Shared output bit groups may be coupled between series configured combinational logic portions using control gates. Clock signals are delayed to activate the control gates after the outputs are stable. In some embodiments, a first combinational logic group and second combinational logic group operate on a clock and inverse clock.