Shared MDAC Amplifier Topology for Lower-Power Pipeline ADCs
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Solution Overview
Problem
High-resolution analog to digital conversion circuits with pipeline structures face challenges in optimizing power consumption due to the high power consumption of amplifying circuits required for signal amplification.
Innovation Solution
The implementation of a shared two-stage amplifying circuit that adjusts current consumption based on the stage of operation, with 100% current used for the first stage MDAC circuit and 85% for the second stage, reducing unnecessary power consumption in the ADC device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a pipeline structure ADC with multiple stages is used to achieve high resolution and high sampling speed, then conversion performance is improved, but power consumption increases due to multiple amplifying circuits
Solution Approach 1:
The patent merges multiple amplifying circuits into a single shared amplifying circuit that serves multiple MDAC stages. The amplifying circuit is time-shared across different stages, where it amplifies the residual analog signal for the first stage, then subsequently serves the second stage. This consolidation reduces the total number of amplifying circuits from multiple separate units to one shared unit, thereby reducing power consumption while maintaining the high-resolution pipeline ADC functionality.
Solution Approach 2:
The amplifying circuit is designed with multi-functionality to serve multiple purposes across different time periods. It functions as the amplifying circuit for the first MDAC stage during its operation period, and then serves as the amplifying circuit for the second MDAC stage in its operation period. This universal design allows a single circuit to perform the amplification function for multiple stages, reducing overall power consumption while maintaining conversion performance.
2Reliability
If separate amplifying circuits are allocated to each MDAC stage to ensure adequate signal amplification, then signal quality is maintained, but device complexity and power consumption increase
Solution Approach 1:
The patent combines multiple separate amplifying circuits into one shared amplifying circuit that is time-shared across different MDAC stages. This merging reduces device complexity by eliminating redundant circuit components while maintaining signal quality through proper timing control. The shared circuit amplifies signals for different stages at different time periods, ensuring each stage receives adequate signal amplification without requiring separate dedicated amplifying circuits.
Solution Approach 2:
The patent implements dynamic operation of the shared amplifying circuit by controlling its operation timing to match the non-overlapping clock periods of different MDAC stages. The amplifying circuit dynamically switches between serving the first stage and the second stage based on the operational timing of each stage. This dynamic time-sharing approach maintains signal quality for each stage while reducing overall device complexity compared to having static, dedicated amplifying circuits for each stage.
Data Source
AI summary
An analog to digital converting device includes a first digital conversion (ADC) circuit configured to convert an inputted analog signal into a first digital signal, a first multiplying digital to analog converting (MDAC) circuit configured to amplify a difference between a first converted signal and the inputted analog signal, a second ADC circuit configured to convert an output of the first MDAC circuit into a second digital signal, a second MDAC circuit configured to amplify difference between a second converted signal converted from the second digital signal and the output of the first MDAC circuit, a third ADC circuit configured to convert an output of the second MDAC circuit into a third digital signal, and a common amplifying circuit shared by the first and the second MDAC circuits, wherein the common amplifying circuit consumes current based on which MDAC circuit the common amplifying circuit operates with.