Shared Memory Architecture for Parallel AI Processing

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Solution Overview

Problem

Current machine learning systems are inflexible and inefficient in handling large data sets and real-time parallel processing tasks, particularly in maintaining state across multiple parallel processes.

Innovation Solution

A system and method that utilize a shared memory architecture allowing multiple devices to access and store data streams, including images, video, and sound, while applying AI-enhanced analysis techniques, with predictive load balancing to optimize processing across a cluster of computing devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple parallel processing tasks access separate memory spaces, then process independence is maintained, but data access efficiency decreases and memory utilization is poor

Engineering Contradiction:
Improveparallel processing efficiencyVSAvoidmemory architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple separate memory spaces into a single shared memory space that is accessible by all parallel processing tasks. This unified memory architecture allows multiple GPU processes to simultaneously access the same data without requiring separate memory allocations, thereby improving memory utilization and data access efficiency while maintaining process independence through software-based task management.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared memory architecture serves multiple functions simultaneously: it acts as common data storage for all parallel tasks, enables efficient data sharing between processes, provides a unified address space for memory management, and supports both read and write operations by multiple tasks. This multi-functional design eliminates the need for separate memory spaces while maintaining process independence.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Speed

If data is stored in separate memory spaces for each process, then data security is improved, but data access speed and processing throughput decrease

Engineering Contradiction:
Improvedata access speedVSAvoiddata security
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent combines multiple process-specific memory spaces into a single shared memory space that is accessible by all parallel processing tasks. This unified architecture eliminates the need for data copying between separate memory spaces, thereby significantly improving data access speed and processing throughput while maintaining data security through software-based access control and process isolation mechanisms.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If large data sets are processed in real-time, then processing capability is improved, but memory bandwidth requirements and latency increase

Engineering Contradiction:
Improvereal-time processing capabilityVSAvoidmemory access latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent merges multiple memory spaces into a single shared memory space that is directly accessible by all parallel processing tasks. This eliminates the need for data copying and reduces memory access latency by allowing tasks to read and write data directly from the shared memory without intermediate storage or data transfer operations, thereby enabling efficient real-time processing of large data sets.

Inventive Principle:
Principle #5Merging (Combining)

4Measurement precision

If hand-tuned special purpose systems are used, then specific problem solving accuracy is improved, but system flexibility and adaptability decrease

Engineering Contradiction:
Improveproblem solving accuracyVSAvoidsystem flexibility
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent implements a universal shared memory architecture that can support multiple different parallel processing tasks and AI algorithms. This flexible memory system can be dynamically allocated to different processing needs without requiring hand-tuned special purpose systems for each specific problem, thereby maintaining high problem-solving accuracy while significantly improving system flexibility and adaptability to emerging application areas.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11556390B2Efficient high bandwidth shared memory architectures for parallel machine learning and AI processing of large data sets and streams
Publication Date: 2023.01.17 AMPLIMER GENOMICS
  • US11556390B2 patent drawing
  • US11556390B2 patent drawing
  • US11556390B2 patent drawing

AI summary

The present disclosure relates to systems and methods to implement efficient high-bandwidth shared memory systems particularly suited for parallelizing and operating large scale machine learning and AI computing systems necessary to efficiently process high volume data sets and streams.