Shared-Memory Controller for Reduced Host Data Transfers

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Solution Overview

Problem

In computing systems with multiple host devices, increased data transmission between devices can cause delays and reduce processing speed improvements.

Innovation Solution

A data storage system with a controller that manages memory regions, allowing shared access modes and dynamic allocation between host devices, including changing access modes in response to requests to improve efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If tasks are distributed and processed by a plurality of host devices, then processing speed is improved, but data transmission delays increase

Engineering Contradiction:
Improveprocessing speedVSAvoiddata transmission delays
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent introduces a shared memory region as an intermediary storage space between host devices. Instead of direct data transmission between hosts, data is written to the shared memory region by one host and read by another, eliminating the need for complex inter-host communication protocols and reducing transmission delays. The memory device acts as a mediator that facilitates efficient data sharing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent transitions from direct host-to-host data transmission to a host-to-memory-to-host indirect transmission model. By introducing the memory dimension as an intermediate layer, the system changes the data flow topology, allowing parallel access and reducing contention on communication channels between hosts.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If a shared memory region is allocated to multiple host devices, then data sharing efficiency is improved, but access mode management complexity increases

Engineering Contradiction:
Improvedata sharing efficiencyVSAvoidaccess mode management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory device autonomously manages access modes for the shared memory region without requiring constant host intervention. The controller automatically switches between read-only and read-write modes based on detected access patterns, and autonomously allocates the memory region to different hosts as needed, reducing the management burden on host devices.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The access mode of the shared memory region is made dynamic rather than static. The system can switch between read-only mode (when multiple hosts need simultaneous read access) and read-write mode (when a single host needs write access), adapting to different operational requirements in real-time to optimize performance.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12417039B2Controller, data storage system and computing system
Publication Date: 2025.09.16 SK HYNIX INC
  • US12417039B2 patent drawing
  • US12417039B2 patent drawing
  • US12417039B2 patent drawing

AI summary

An embodiment of the disclosed technology reduces direct data transmission and reception between a plurality of host devices and enables data sharing by a data storage device, through management of allocation information and access mode information of memory regions included in the data storage device used by the plurality of host devices, thereby improving data processing performance by the plurality of host devices and the use efficiency of the data storage device.