Shared Memory Debugging via Deterministic Replay Logging

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Solution Overview

Problem

Debugging errors in shared memory of multi-process environments is challenging due to intermittent faults and the difficulty in identifying the process responsible for corruption, as existing methods lack efficient tools for deterministic replay and root cause analysis.

Innovation Solution

Instrumenting machine code to generate recorded executions and logging shared memory accesses in a common log, allowing for deterministic replay and identification of the process causing errors, with features like cache updates and efficient data storage to reduce non-determinism.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple processes access shared memory concurrently, then communication efficiency between processes is improved, but the difficulty of identifying the process causing memory corruption increases

Engineering Contradiction:
Improvecommunication efficiencyVSAvoiddifficulty of identifying corrupting process
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent applies preliminary action by implementing logging of shared memory accesses before corruption occurs. The system records process identifiers, access addresses, and timing information in advance, enabling post-mortem analysis to identify the corrupting process without requiring real-time intervention or complex runtime tracking mechanisms.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary logging mechanism that mediates between multiple processes accessing shared memory. This logging system acts as a neutral observer that records all accesses without interfering with process execution, providing objective data for identifying the corrupting process while maintaining communication efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If shared memory is used for process communication, then inter-process communication speed is improved, but the reliability of memory access decreases due to potential corruption

Engineering Contradiction:
Improveinter-process communication speedVSAvoidmemory access reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements feedback by analyzing logged memory access patterns to identify corruption sources. The system continuously monitors and records accesses, then uses this feedback information to pinpoint the process causing corruption, enabling targeted debugging and resolution while maintaining the high-speed shared memory communication mechanism.

Inventive Principle:
Principle #23Feedback

3Difficulty of detecting and measuring

If debugging tools are added to track shared memory accesses, then debugging capability is improved, but system complexity increases

Engineering Contradiction:
Improvedebugging capabilityVSAvoidsystem complexity
Core Design Contradiction:
Difficulty of detecting and measuringVSDevice complexity

Solution Approach 1:

The patent extracts the debugging functionality into a separate logging and analysis mechanism that operates independently from the core process execution. This extraction allows the debugging tool to track shared memory accesses without adding complexity to the process logic or requiring modifications to the shared memory management itself.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses copying by creating a log copy of memory access information rather than directly instrumenting or modifying the actual memory access paths. This copying approach enables debugging analysis while keeping the original system simple and unmodified, as the log is a separate representation of access patterns.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS11366740B2Debugging shared memory errors
Publication Date: 2022.06.21 UNDO
  • US11366740B2 patent drawing
  • US11366740B2 patent drawing
  • US11366740B2 patent drawing

AI summary

There is provided a method for debugging errors in a shared memory. The method comprises executing instrumented machine code of a plurality of processes to generate a recorded execution of each of the plurality of processes for deterministic replay of the recorded execution. The method further comprises logging accesses to the shared memory by each of the plurality of processes in a shared memory log for debugging errors in the shared memory by analysing the recorded executions and the shared memory log. The shared memory log is accessible by each of the plurality of processes.