Shared-Memory De-Interleaving for Lower-Capacity Data Reading
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Solution Overview
Problem
The existing data transmission systems, particularly in digital broadcasting, require significant memory capacity and incur high costs due to the need for separate areas for writing and reading data, leading to inefficient use of memory resources.
Innovation Solution
A data writing/reading method that alternates the direction of writing and reading data in the same memory area, allowing new data to be written while reading existing data, reducing the need for additional memory space and optimizing memory usage by arranging data in matrix structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate memory areas are allocated for writing and reading data, then data processing can proceed without interference, but memory capacity requirements and costs increase significantly
Solution Approach 1:
The patent merges the write memory area and read memory area into a single shared memory space. The de-interleaving processing unit performs both write and read operations within the same memory area by coordinating access timing and addresses, eliminating the need for separate memory areas and reducing overall memory capacity requirements while maintaining reliable data processing.
2Productivity
If large memory capacity is allocated for de-interleaving processing, then complete superframe data can be processed, but system cost increases
Solution Approach 1:
The patent segments the de-interleaving processing into sequential stages that operate on portions of the superframe data. The de-interleaving processing unit processes data in manageable chunks through coordinated write and read operations within the same memory area, enabling complete superframe processing without requiring memory capacity for entire superframes, thus reducing system cost.
3Ease of operation
If memory is divided into multiple areas for different operations, then operation interference is avoided, but memory resource utilization efficiency decreases
Solution Approach 1:
The patent implements dynamic memory access coordination where the de-interleaving processing unit adaptively manages write and read operations within the same memory area. By dynamically controlling access timing and addresses based on processing stage requirements, the system maintains operation independence without requiring static memory division, thereby improving memory resource utilization efficiency.
Data Source
AI summary
A data writing/reading method, a de-interleaving method, a data processing method, a memory, and a memory drive are provided whose costs are reduced. When a plural data interleaved in transmitter (100) are written in memory (110a) of receiver (110), the write direction is alternatively changed to row direction and column direction.