Shared Memory DMA Channels for Zero-Copy Application Hardware Communication

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Solution Overview

Problem

Building a high-performance hardware device stack in message-passing oriented platforms is challenging due to the need for data copying when communicating between applications and hardware drivers, which increases latency and complexity.

Innovation Solution

Implementing Inter-Process Communication (IPC) and Direct Memory Access (DMA) channels using a common piece of physical memory, allowing data to be mapped directly between application and hardware driver views without copying, and leveraging simplified flow-control to prevent over-production and eliminate the need for intermediate queues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data is copied between application memory and hardware driver memory, then data communication is achieved, but latency increases and performance decreases

Engineering Contradiction:
Improvedata communication speedVSAvoiddata copying latency
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent merges the application memory space and hardware driver memory space by establishing a shared memory region that both can access directly. The hardware driver memory is mapped into the application's address space, allowing the application to write data directly to the shared region without copying. This eliminates the data copying step entirely, resolving the contradiction between achieving data communication and minimizing latency.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a shared memory region as an intermediary between the application and hardware device. This shared memory acts as a common buffer that both parties can access directly, eliminating the need for data copying between separate memory spaces. The shared memory region serves as the mediator that enables direct communication while maintaining low latency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If traditional message-passing IPC is used, then type safety is maintained, but data copying occurs between processes

Engineering Contradiction:
Improvetype safetyVSAvoidcommunication efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent combines the benefits of message-passing IPC with shared memory by allowing the application to treat the shared hardware driver memory region as part of its own address space. This merging approach maintains the type safety of message-passing while eliminating the data copying overhead, as the application can directly access and write to the shared memory region without traditional copy operations.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If kernel mode drivers are used for tight integration, then performance improves, but complexity of mode transitions increases

Engineering Contradiction:
Improveintegration performanceVSAvoidkernel mode transition complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts the performance benefits of kernel mode integration while eliminating the complexity of kernel mode transitions. By allowing user mode applications to directly access hardware driver memory through mapped shared memory, the system achieves tight integration performance without requiring kernel mode transitions or privileged operations. The complex kernel mode transition mechanism is removed while preserving the performance advantage.

Inventive Principle:
Principle #2Taking out (Extraction)

4Reliability

If intermediate queues are used for flow control, then data buffering is achieved, but additional copying and latency are introduced

Engineering Contradiction:
Improveflow controlVSAvoidqueue copying latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the flow control function with the shared memory region by implementing signaling mechanisms directly within the shared memory space. Instead of using separate intermediate queues that require data copying, the system uses memory-mapped signaling and status registers that allow the hardware device and application to coordinate data flow directly. This eliminates the need for additional buffering queues while maintaining reliable flow control.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9311225B2DMA channels
Publication Date: 2016.04.12 MICROSOFT TECHNOLOGY LICENSING LLC
  • US9311225B2 patent drawing
  • US9311225B2 patent drawing
  • US9311225B2 patent drawing

AI summary

Communicating between an application and a hardware device. A method includes an application writing data to host physical memory using an application view of the memory. The method further includes mapping the data in the physical memory to a hardware driver view, usable by a hardware driver, without needing to copy the data to a different physical storage location. The method further includes mapping the data to a hardware accessible view accessible by a hardware device without needing to copy the data to a different physical storage location.