Shared Memory Architecture for Emulation Chip Data Transfer
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Solution Overview
Problem
Conventional data sharing between simulation operations and emulation operations is slow due to high latency in network paths and hardware limitations, leading to inefficient data transfer and limited memory usage.
Innovation Solution
Implementing a shared memory system within an emulation chip that allows simulation processors and emulation processors to exchange data directly, enabling faster and more comprehensive data transfers without relying on slow network paths or limited host workstation memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is transferred between simulation and emulation systems via peripheral component interconnect bus, then data sharing is achieved, but transfer speed is slow
Solution Approach 1:
The patent merges the simulation system and emulation system onto a single chip, allowing simulation processors and emulation processors to share memory directly through on-chip interconnects. This eliminates the need for slow peripheral component interconnect bus transfers and enables fast local memory access between both processor types.
2Speed
If network path is used to access emulation system states, then data sharing is enabled, but latency is very high
Solution Approach 1:
By integrating both simulation and emulation processors on the same chip with shared memory access, the patent eliminates the network path entirely. Simulation processors can directly read and write to shared memory without going through network interfaces, reducing latency to minimal on-chip signal propagation time.
Solution Approach 2:
The shared memory acts as an intermediary that both simulation and emulation processors can access directly. This eliminates the need for high-latency network communication by providing a common, fast access point for data exchange between the two processor types.
3Quantity of substance
If host workstation memory is used for emulation data, then data storage is achieved, but memory capacity is limited
Solution Approach 1:
The patent combines simulation and emulation processors on a single chip with shared memory, allowing both processor types to access the same memory space. This eliminates the hardware limitation of host workstation memory capacity and enables access to larger memory spaces through the chip's memory architecture.
Data Source
AI summary
A shared memory is provided between simulation processors and emulation processors within an emulation chip. The shared memory is configured to enable the simulation processors and the emulation processors to exchange simulation data and emulation data respectively with each other during simulation and emulation operations. The simulation processors and the emulation processors may update their respective simulation and emulation operations in response to the simulation data and the emulation data exchanged via the shared memory.