Integrated Transaction Processing With Shared-Memory Failover

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Solution Overview

Problem

Existing electronic trading systems face challenges in achieving fault tolerance with minimal recovery time and performance degradation due to geographic separation of backup systems, which introduces communication latency and synchronization issues.

Innovation Solution

Integrate core components of the trading system on a single processing platform, utilizing shared memory communication and inter-process communication to eliminate network latencies, and implement a hard backup system that synchronizes state across components to ensure seamless failover.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If backup systems are geographically separated from primary systems, then fault tolerance and system reliability are improved, but communication latency and synchronization issues worsen

Engineering Contradiction:

Improvefault toleranceVSAvoidcommunication latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent transitions from geographic separation (spatial dimension) to logical separation within the same physical infrastructure. Backup systems are colocated with primary systems but isolated through virtualization and network partitioning, eliminating the need for long-distance communication while maintaining fault tolerance through logical independence.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nested fault tolerance where backup systems are embedded within the primary system's physical infrastructure. The backup environment is nested within the same data center or facility, allowing rapid failover while maintaining geographic proximity for synchronized state transfer.

Inventive Principle:

Principle #7Nested doll (Nesting)

2Reliability

If backup systems are geographically separated, then disaster recovery capability is improved, but data synchronization speed worsens

Engineering Contradiction:

Improvedisaster recovery capabilityVSAvoiddata synchronization speed

Core Design Contradiction:

ReliabilityVSSpeed

Solution Approach 1:

The patent separates backup systems logically rather than geographically, enabling high-speed data synchronization through local storage and memory while maintaining disaster recovery capability through network isolation and virtualization. Data can be synchronized at memory speeds while the virtual boundary provides disaster protection.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Device complexity

If core components are integrated on a single processing platform, then system complexity is reduced, but fault tolerance capability worsens

Engineering Contradiction:

Improvesystem complexityVSAvoidfault tolerance capability

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent segments the processing platform into distinct primary and backup components that can operate independently. Each component is isolated through virtualization boundaries and network partitioning, allowing fault containment while maintaining physical integration for reduced complexity in deployment and management.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces virtualization layers and network intermediaries that enable fault isolation between integrated components. These intermediary layers allow core components to run on the same physical platform while preventing fault propagation, effectively decoupling the physical integration from logical dependency.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Adaptability or versatility

If network interconnects are used for component communication, then system scalability is improved, but communication latency worsens

Engineering Contradiction:

Improvesystem scalabilityVSAvoidcommunication latency

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent transitions communication from network protocols (higher dimension with more overhead) to shared memory and inter-process communication (lower dimension with direct access). This dimensional change eliminates network stack latency while maintaining the scalability benefits of modular component design through memory-mapped communication.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250321838A1Failure recovery in a fault tolerant architecture

Publication Date: 2025.10.16 CHICAGO MERCANTILE EXCHANGE INC

AI summary

A system/process provides fault tolerance to an integrated component system which integrates core components of a transaction processing system into a single processing platform, i.e., a single server, enabling elimination of the network interconnects and associated latencies introduced thereby in favor of much faster interconnects, such as inter-process communication and shared memory communication messaging, where a failure of any one component necessitates failing over the entire system to a backup thereof.