Shared-Memory Failure Recovery for Integrated Trading Platforms

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing fault-tolerant systems for electronic trading systems face challenges in minimizing recovery time and performance degradation due to network latencies and asymmetric communication paths between primary and backup instances, especially in latency-sensitive applications like financial transaction processing.

Innovation Solution

Integrate core components of the electronic trading system onto a single processing platform using shared memory communication and inter-process communication, with a fault tolerance mechanism that synchronizes and fails over all components to a backup instance on the same server, ensuring synchronized state across components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If backup systems are located in different geographic regions from the primary instance, then fault tolerance and system reliability are improved, but communication latency and data synchronization time increase

Engineering Contradiction:

Improvefault toleranceVSAvoidcommunication latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent transitions from geographic distribution (spatial dimension) to architectural distribution (logical dimension). Multiple backup instances are deployed in the same data center but isolated via virtualization and network segmentation, achieving fault tolerance without geographic latency penalties. The system uses logical separation through virtual networks and security zones rather than physical geographic separation.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces an intermediary messaging bus or event stream as a mediator between primary and backup instances. This intermediary enables asynchronous communication and state synchronization, reducing the impact of network latency while maintaining data consistency across distributed instances.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If core components are integrated onto a single processing platform using shared memory, then communication latency is reduced and system performance is improved, but fault tolerance becomes more challenging

Engineering Contradiction:

Improvesystem performanceVSAvoidfault tolerance

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent segments the monolithic system into independent microservices or components that can be deployed as separate instances. Each component can fail independently without bringing down the entire system, enabling fault tolerance while maintaining high performance through shared memory communication within each instance.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the operational parameters of the system by implementing configurable failover thresholds, synchronization intervals, and state replication frequencies. These parameter adjustments allow the system to optimize between performance and reliability based on operational conditions, maintaining high productivity while ensuring fault tolerance.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If rapid failover is implemented with minimal performance impact, then system availability is improved, but complexity of the fault tolerance mechanism increases

Engineering Contradiction:

Improvesystem availabilityVSAvoidfault tolerance mechanism complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements preliminary actions by pre-warming backup instances, pre-synchronizing state data, and pre-configuring failover routes before failures occur. This reduces the complexity of real-time failover decisions and enables rapid switching with minimal performance impact, as the heavy lifting of synchronization and preparation is done in advance.

Inventive Principle:

Principle #10Preliminary action

4Productivity

If asymmetric communication paths are used between primary and backup instances, then network efficiency is improved, but synchronization accuracy and state consistency deteriorate

Engineering Contradiction:

Improvenetwork efficiencyVSAvoidstate synchronization accuracy

Core Design Contradiction:

ProductivityVSMeasurement precision

Solution Approach 1:

The patent implements feedback mechanisms where backup instances continuously monitor the state of primary instances and report discrepancies. This feedback loop enables automatic correction of synchronization drift caused by asymmetric communication paths, maintaining state consistency while allowing network efficiency optimizations.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS12417155B2Failure recovery in a fault tolerant architecture

Publication Date: 2025.09.16 CHICAGO MERCANTILE EXCHANGE INC

AI summary

A system/process provides fault tolerance to an integrated component system which integrates core components of a transaction processing system into a single processing platform, i.e., a single server, enabling elimination of the network interconnects and associated latencies introduced thereby in favor of much faster interconnects, such as inter-process communication and shared memory communication messaging, where a failure of any one component necessitates failing over the entire system to a backup thereof.