Shared Memory Computational Storage for Lower Host I/O Overhead

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Solution Overview

Problem

The increasing frequency of data input and output between a host and computational storage devices degrades the performance of the host, necessitating a solution to reduce this frequency and enhance data transmission speed.

Innovation Solution

A computational storage device with a shared memory accessible by the host, a computational storage processor, a storage media, and a storage processor, which allows direct data access and processing to minimize data transfer frequency by using a shared memory for data exchange and result generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the frequency of data input and output between host and computational storage device is increased to process big data more quickly, then data processing speed is improved, but host performance degrades

Engineering Contradiction:
Improvedata processing speedVSAvoidhost performance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

A shared memory is introduced as an intermediary between the host and computational storage device. The shared memory allows the host to directly access data without frequent explicit data transfer operations, thereby reducing the frequency of data input/output while maintaining fast data processing capability. This mediator resolves the contradiction by enabling high-speed processing without degrading host performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If data transfer frequency between host and computational storage device is reduced to improve host performance, then host performance is maintained, but data transmission speed decreases

Engineering Contradiction:
Improvehost performanceVSAvoiddata transmission speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

Data is pre-loaded into the shared memory before the host needs to access it. The computational storage device performs preliminary actions by loading data into the shared memory in advance, allowing the host to access data directly from the shared memory without frequent transfer operations. This preliminary action enables both low transfer frequency (maintaining host performance) and fast data access (maintaining transmission speed).

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250390228A1Computational storage device communicating with host using shared memory and operating method thereof
Publication Date: 2025.12.25 SK HYNIX INC
  • US20250390228A1 patent drawing
  • US20250390228A1 patent drawing
  • US20250390228A1 patent drawing

AI summary

A computational storage device comprises a shared memory directly accessible by a host, a computational storage processor, a storage media configured to store base data, and a storage processor. The computational storage processor reads request information written to the shared memory by the host, and responds to the host with result data for the request information. The computational storage processor reads base data stored in a storage media, extracts result data from the base data, writes the result data to the shared memory, and transmits, to the host, a notification indicating that the result data has been written to the shared memory.