Shared Memory Architecture for Heterogeneous Image Processing
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Solution Overview
Problem
Current image processing technologies using heterogeneous platforms, such as CPU+GPU, face performance deficiencies due to independent memories of different processors, leading to significant data transfer delays and reduced image processing speed.
Innovation Solution
Implementing a shared memory system between the partitioning and classification processing units, allowing direct access and reducing data transportation, and utilizing a scheduling processing unit to manage memory adjustments and processing workflows in a pipelining manner to optimize resource utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a heterogeneous platform with independent memories (CPU+GPU) is used for image recognition, then the computation performance of CPU and image processing performance of GPU are utilized, but data exchange between heterogeneous processors causes long delay and affects detection performance
Solution Approach 1:
The patent merges the memory systems of the CPU and GPU into a shared memory architecture. The memory management unit allocates a unified memory space that both processors can access simultaneously, eliminating the need for data transfer between separate memory spaces. This allows the CPU and GPU to operate on the same image data without interruption, resolving the time delay caused by data exchange while preserving the computational advantages of the heterogeneous platform.
2Productivity
If data is constantly exchanged between heterogeneous processors (CPU and GPU), then image partitioning and classification can be performed, but a large quantity of data exchange operations cause relatively long delay
Solution Approach 1:
The patent implements continuous image processing by eliminating data transfer interruptions between processors. The memory management unit enables the CPU to perform partitioning operations and the GPU to perform classification operations on the same image data simultaneously and continuously, without the stop-start nature caused by data exchange. This continuous operation maintains high productivity while eliminating transportation delays.
3Reliability
If memories of heterogeneous processing units are independent, then each processor has dedicated memory space, but data needs to be transported between processing units which reduces image processing speed
Solution Approach 1:
The patent creates a universal memory space that serves both the CPU and GPU simultaneously. The memory management unit implements a virtual memory system where a single physical memory space is accessible by both processors through virtual addressing. This multi-functional memory architecture maintains the reliability of dedicated memory allocation while enabling high-speed access for both processors, thus preserving memory independence benefits while achieving high processing speed.
Data Source
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AI summary
Embodiments of the present invention disclose an image processing apparatus, to improve image processing performance. The image processing apparatus provided in the embodiments of the present invention includes a partitioning processing unit and a classification processing unit that are heterogeneous, a first memory that is configured to store a to-be-processed image, and a second memory that is configured to store a result of an image partitioning operation performed by the partitioning processing unit. Both the first memory and the second memory are shared by the partitioning processing unit and the classification processing unit. In the embodiments of the present invention, shared data is stored in a shared memory, so that data transportation operations between different processing units are reduced in an image processing process, a delay caused by data transportation between the processing units is avoided, an image processing speed can be increased, and image processing performance can be improved. The embodiments of the present invention further provide a related image processing method.