Shared Memory Mmap Parallel Data Transfer
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Solution Overview
Problem
Shared memory multiprocessor systems face inefficiencies in data transfer and processing due to the need for processors to communicate and access shared files, particularly when executing applications that require parallel processing across multiple processors.
Innovation Solution
The method involves creating multiple memory mappings (mmaps) between a shared file and address spaces associated with each processor, allowing for direct and parallel data transfer and processing without the need for explicit permission mechanisms, enabling processors to access and store data in shared memory efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If processors use traditional file access methods with permission mechanisms and system traps, then security and control are maintained, but data transfer efficiency and processing speed deteriorate
Solution Approach 1:
The patent introduces a shared memory-mapped file region as an intermediary between processors and the file system. This mmap region acts as a buffer that allows processors to access file data directly through memory operations without requiring system traps or complex permission checks, thus improving data transfer efficiency while maintaining security through controlled mmap access rights
Solution Approach 2:
The patent replaces the traditional mechanical file access mechanism (system traps, permission checks, read/write operations) with a memory-based access mechanism. Processors access file data through memory-mapped addresses using standard load/store operations, eliminating the overhead of system calls and permission verification while maintaining controlled access through mmap permissions
2Loss of time
If processors access shared files through traditional methods with system traps, then system control is maintained, but execution time increases
Solution Approach 1:
The mmap region serves as an intermediary that caches file data in memory, allowing processors to access frequently used data without repeated system traps. This reduces execution time by eliminating repeated system call overhead while maintaining data access simplicity through unified memory addresses
Solution Approach 2:
The system performs preliminary actions by mapping the shared file to memory regions before processing begins. This pre-established memory mapping allows processors to immediately access data without performing system traps during execution, significantly reducing execution time while maintaining ease of operation through simple memory access instructions
3Productivity
If multiple processors access the shared file simultaneously with locks, then data consistency is maintained, but processing parallelism is reduced
Solution Approach 1:
The patent segments the shared file access into independent memory-mapped regions that can be accessed by different processors simultaneously. Each processor works on its assigned portion of the mmap region without requiring locks, maintaining data consistency through the inherent isolation of memory addresses while maximizing parallel processing capability
Solution Approach 2:
The system creates multiple independent copies of the file mapping in each processor's address space through mmap. These copies allow processors to read and write data independently without interfering with each other, eliminating the need for locking mechanisms while maintaining data consistency through controlled mmap access permissions
Data Source
AI summary
A method for processing using a shared file that includes creating a plurality of mmaps between a shared file and a plurality of address spaces, wherein each of the plurality of mmaps maps at least a portion of the shared file to one of the plurality of address spaces, and wherein each of the plurality of address spaces is associated with one of a plurality of processors, transferring, in parallel, data between the shared file and the address spaces using the plurality of mmaps associated with the plurality of address spaces, processing the data in parallel by the plurality of processors to obtain a result, wherein the plurality of processors access data from the plurality of address spaces, and storing the result in the shared memory.