Shared Non-Volatile Memory Interface for Multi-Processor Storage
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Solution Overview
Problem
In vehicles with multiple processors performing various functions, each processor often has its own storage device, leading to redundant storage of the same data across separate memory cells, increasing complexity, cost, and power consumption.
Innovation Solution
A storage device configured to connect with multiple processors via different communication methods, allowing them to share a single non-volatile memory, reducing redundant storage by mapping logical block addresses to shared physical addresses, thereby improving storage capacity and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If each processor has its own separate storage device, then each processor can independently access storage, but redundant data must be stored multiple times across separate memory cells
Solution Approach 1:
The patent merges multiple separate storage devices into a single shared storage device that serves multiple processors. The storage device includes a controller that receives commands from different processors through different interfaces and manages data storage centrally, eliminating redundant copies of the same data while maintaining independent access capability for each processor.
Solution Approach 2:
The storage device is designed with multi-functionality to serve multiple processors simultaneously. The controller can handle commands from different processors through different storage interfaces (e.g., first storage interface and second storage interface), allowing a single storage device to perform the functions previously requiring multiple separate storage devices.
2Ease of operation
If each processor has its own storage device, then storage access is simple and direct, but device complexity and manufacturing cost increase
Solution Approach 1:
The storage controller acts as an intermediary between multiple processors and the non-volatile memory. It receives storage commands from different processors through different interfaces, translates them into unified memory operations, and manages data flow centrally. This mediator approach simplifies the overall system architecture by replacing multiple direct processor-to-memory connections with a single controlled interface.
3Speed
If each processor has its own storage device, then data access speed is guaranteed, but power consumption increases due to redundant storage operations
Solution Approach 1:
By merging multiple storage devices into one shared storage system, the patent eliminates redundant read/write operations that would occur when the same data is stored and accessed from multiple separate storage devices. The single storage device consolidates data storage, reducing the total number of storage operations and associated power consumption while maintaining fast access speeds through efficient controller management.
Data Source
AI summary
Some example embodiments provide an electronic device including: a plurality of processors; and a storage device. The storage device includes a first storage interface connected to a first processor among the plurality of processors, a second storage interface connected to a second processor among the plurality of processors, a non-volatile memory, and an interface controller that controls a connection relationship between the first storage interface, the second storage interface, and the non-volatile memory. The first processor, the second processor, and the storage device are on a first substrate. The storage device communicates with the first and second processors via different methods, such that the storage device communicates with the first processor according to a first method and communicates with the second processor according to a second method different from the first method.