Shared Memory Architecture for Neurosynaptic Core Integration
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Solution Overview
Problem
Current neuromorphic and synaptronic computation systems lack an efficient method to integrate and process neuronal firing events across multiple neurosynaptic core modules, which hinders the effective simulation of biological brain functions and learning processes.
Innovation Solution
A neural network system with a single memory block that maintains information for multiple neurosynaptic core modules, utilizing logic circuits to integrate neuronal firing events and update neuron attributes, while employing synaptic connectivity information and routing data to manage communication between neurons.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple neurosynaptic core modules are used to increase computational capacity, then the productivity of neuromorphic systems is improved, but the device complexity increases due to the need to manage and integrate firing events across multiple modules
Solution Approach 1:
The patent merges the memory functions of multiple neurosynaptic core modules into a single shared memory block. This allows multiple modules to access and store neuron attributes, synaptic weights, and firing event information centrally, eliminating the need for separate memory structures in each module and thereby reducing overall system complexity while maintaining high computational capacity.
Solution Approach 2:
The single shared memory block serves multiple functions across different neurosynaptic core modules, including storing neuron attributes, synaptic connectivity information, routing data, and firing event records. This multi-functional memory structure reduces the total number of memory components needed and simplifies the architecture.
2Device complexity
If a single memory block is used for multiple neurosynaptic core modules, then the device complexity is reduced, but the loss of information may increase due to the need to manage access and updates across multiple modules sharing the same memory
Solution Approach 1:
The system implements feedback mechanisms where logic circuits monitor and track changes in the shared memory block. When firing events occur in one module, the logic circuits detect these changes and propagate updates to other modules, ensuring all modules have consistent information about neuron states, synaptic weights, and connectivity without requiring complex locking mechanisms.
Solution Approach 2:
The system performs preliminary actions by pre-establishing memory addresses and data structures in the shared memory block before processing begins. Logic circuits are pre-configured with routing information and memory access patterns, allowing efficient and conflict-free updates across multiple modules without requiring complex real-time coordination.
3Ease of operation
If neuronal firing events are integrated across multiple modules using a single memory block, then the ease of operation is improved through unified memory access, but the speed of processing may decrease due to memory access contention and synchronization requirements
Solution Approach 1:
The patent segments the shared memory block into different address spaces or memory regions, each associated with specific neurosynaptic core modules. This allows simultaneous read-access by multiple modules without complete contention, as each module can access its designated region independently while still sharing overall system state information.
Solution Approach 2:
The system uses periodic action by implementing synchronized memory updates at discrete time steps rather than continuous updates. Logic circuits process firing events and update memory in periodic cycles, allowing multiple modules to operate in parallel during non-critical periods and reducing the impact of memory access contention on overall processing speed.
Data Source
AI summary
Embodiments of the invention relate to a neural network system comprising a single memory block for multiple neurosynaptic core modules. One embodiment comprises a neural network system including a memory array that maintains information for multiple neurosynaptic core modules. Each neurosynaptic core module comprises multiple neurons. The neural network system further comprises at least one logic circuit. Each logic circuit receives neuronal firing events targeting a neurosynaptic core module of the neural network system, and said logic circuit integrates the firing events received based on information maintained in said memory for said neurosynaptic core module.