Shared-Memory CPU-GPU Query Processing to Remove Bus Bottlenecks
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Solution Overview
Problem
Traditional CPUs exhibit inefficiencies in database workloads due to limited memory access capabilities and parallel processing, while alternative hardware solutions like GPUs and FPGAs face constraints that limit overall performance gains, primarily due to data transfer bottlenecks via slower computing buses.
Innovation Solution
Integrating multiple processing architectures, such as a CPU and GPU, within a shared memory on a single hardware chip, allowing direct data access and minimizing bottlenecks by eliminating the need for data transfer over a computer bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional CPUs are used to handle database workloads, then system stability and ease of operation are maintained, but memory access capabilities and parallel processing performance are limited
Solution Approach 1:
The patent combines CPU and GPU into a single integrated processing unit with shared memory, allowing both processing architectures to work together on query processing tasks. The CPU handles query parsing and coordination while the GPU performs parallel data processing, achieving improved query processing speed without requiring separate hardware systems.
Solution Approach 2:
The integrated processing unit is designed to perform multiple functions: the CPU component handles traditional sequential processing tasks while the GPU component handles parallel processing tasks. This multi-functional design allows a single device to adapt to different query processing requirements without needing separate specialized hardware.
2Productivity
If alternative hardware like GPUs and FPGAs is used to address CPU limitations, then parallel processing capability is improved, but data transfer bottlenecks via slower computing buses limit overall performance gains
Solution Approach 1:
The patent integrates the GPU and shared memory into a unified architecture where the GPU has direct access to the shared memory without requiring external bus transfers. This eliminates the data transfer bottleneck that plagues separate GPU implementations, as data can be accessed directly from the shared memory by both CPU and GPU components within the same integrated unit.
3Productivity
If multiple processing architectures are integrated on a single chip with shared memory, then memory bandwidth and computation power are enhanced, but device complexity increases
Solution Approach 1:
The integrated processing unit is segmented into distinct functional components: a CPU component for sequential processing, a GPU component for parallel processing, and a shared memory component. This segmentation allows each component to be optimized for its specific function while working together through the shared memory interface, managing complexity through modular design.
4Ease of operation
If CPUs are used for database workloads, then ease of operation is maintained, but memory access capabilities are limited
Solution Approach 1:
The shared memory acts as an intermediary between the CPU and GPU, providing a common data space that both processing units can access. This mediator enables the GPU to access data directly without requiring traditional CPU-mediated memory access, significantly improving memory access capability while maintaining system operability through the CPU's continued role in query coordination.
Data Source
AI summary
Query processing systems and methods are disclosed herein. In an example system, query information is received over a network for processing a query. A first processing architecture loads a set of data associated with the query into a shared memory. A second processing architecture accesses the set of data from the shared memory. In one example, the first and second processing architectures and the shared memory are integrated in a hardware chip (e.g., a chiplet containing several processor architectures, such as CPU and a graphics processing unit (GPU)). The query is processed based on the set of data accessed from the shared memory using the second processing architecture to generate a query result. The query result is provided over the network. In this manner, a computing device may execute a query based on different processing systems contained therein.