Shared Memory Switch Virtual Congestion Domains

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Solution Overview

Problem

Conventional switch fabric architectures face challenges in efficiently managing congestion and flow control, particularly in converged fabrics with diverse traffic classes, leading to bandwidth limitations and high manufacturing costs due to reliance on credit-based systems or statistical packet drop methods.

Innovation Solution

A shared memory switch architecture with independent virtual congestion domains, employing frame classification, rate limiting, and congestion management circuitry to classify and manage traffic classes, implement pause-pacing functions, and generate congestion notifications, allowing for efficient bandwidth utilization and low-latency congestion control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If credit-based input/output queued switch architecture is used, then flow control is achieved, but bandwidth is significantly limited

Engineering Contradiction:
Improveflow controlVSAvoidbandwidth
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The invention segments the output queue into multiple virtual output queues (VOQs), one per input port, allowing independent flow control for each input port while maintaining full bandwidth capability. This resolves the contradiction by enabling fine-grained flow control without the bandwidth limitations of conventional shared output queues.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from a single-dimensional output queue to a multi-dimensional virtual output queue structure where each input port has its own virtual queue. This dimensional expansion allows simultaneous flow control for multiple inputs without compromising overall bandwidth.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If statistical packet drop with very large buffers is used, then near full bandwidth operation is achieved, but manufacturing cost increases and applications sensitive to loss are penalized

Engineering Contradiction:
ImprovebandwidthVSAvoidmanufacturing cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The invention implements feedback-based flow control through pause frames sent from output ports to input ports when congestion is detected. This allows the system to achieve near full bandwidth operation without requiring very large buffers or expensive off-chip memories, as the feedback mechanism dynamically adjusts traffic flow based on actual congestion conditions.

Inventive Principle:
Principle #23Feedback

3Productivity

If conventional flow control is used, then bandwidth is limited, but implementing lossless rate limiting and independent policy enforcement for multiple traffic classes is difficult

Engineering Contradiction:
ImprovebandwidthVSAvoidcongestion management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The invention segments congestion management into independent virtual output queues, each with its own flow control mechanism. This allows different traffic classes to be managed independently with different congestion control policies while maintaining overall system bandwidth efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention implements dynamic flow control where the pause frame mechanism can be activated or deactivated based on current congestion conditions. This dynamic adjustment allows the system to adapt to varying traffic patterns and implement lossless rate limiting without requiring complex static configurations.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7916718B2Flow and congestion control in switch architectures for multi-hop, memory efficient fabrics
Publication Date: 2011.03.29 INTEL CORP
  • US7916718B2 patent drawing
  • US7916718B2 patent drawing
  • US7916718B2 patent drawing

AI summary

A shared memory switch and switch fabric architecture are described which employ partitions of the shared memory to implement multiple, independent virtual congestion domains, thereby allowing congestion to be handled for different classes of traffic independently.