Shared Memory Tracking Tables for Low-Latency Access Violation Detection

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Solution Overview

Problem

Existing shared memory multiprocessing systems face challenges in efficiently managing access violations and minimizing latency and chaining in multi-processor environments, particularly in systems-on-chip (SoC) architectures.

Innovation Solution

Implementing a tracking table mechanism based on hash functions to monitor and manage access violations by generating indices and tracking entries for application data, using a hash table with configurable registers and collision heap allocations to minimize latency and adapt to on-demand applications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional shared memory multiprocessing is used, then multiple processors can share resources and work together, but access violation management becomes inefficient and latency increases

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidaccess violation detection latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-establishing tracking tables and hash structures before memory access operations occur. The system proactively monitors and records memory access patterns, node identifiers, and timestamp information in advance, enabling rapid detection of access violations without requiring complex runtime analysis, thus reducing detection latency while maintaining processing efficiency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces tracking tables and hash functions as intermediary structures between processors and shared memory. These intermediaries automatically record and manage memory access information, acting as a mediator that simplifies access violation detection. The hash table structure serves as an intermediary index that rapidly maps memory addresses to tracking entries, eliminating the need for processors to directly manage complex access control logic

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If comprehensive tracking of all memory accesses is implemented, then access violations can be detected, but system complexity increases

Engineering Contradiction:
Improveaccess violation detection accuracyVSAvoidtracking mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the tracking mechanism into distinct modular components: hash function modules for address mapping, tracking table structures for storing access information, and node identifier registration modules. Each component performs a specific function independently, making the overall system easier to implement, maintain, and debug while ensuring reliable access violation detection through coordinated operation of these segmented modules

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes parameter changes by incorporating timestamp fields and node identifier fields into tracking entries. By changing the state parameters of memory accesses (recording when and by whom accesses occur), the system achieves comprehensive monitoring. The hash function transforms memory address parameters into manageable index values, simplifying the tracking structure while maintaining detection accuracy

Inventive Principle:
Principle #35Parameter changes

3Speed

If hash tables are used to organize tracking data, then access speed improves, but memory usage increases

Engineering Contradiction:
Improvetracking data access speedVSAvoidmemory consumption
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent makes the tracking table structure multi-functional by using it for both rapid data retrieval through hash indexing and systematic storage of access violation information. The same data structure serves dual purposes: as a speed-optimized index and as a comprehensive record-keeping mechanism, eliminating the need for separate storage structures and reducing overall memory consumption while maintaining fast access speeds

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12566716B2Systems and methods for timestep shared memory multiprocessing based on tracking table mechanisms
Publication Date: 2026.03.03 SAMSUNG ELECTRONICS CO LTD
  • US12566716B2 patent drawing
  • US12566716B2 patent drawing
  • US12566716B2 patent drawing

AI summary

Provided are systems, methods, and apparatuses for timestep shared memory multiprocessing based on tracking table mechanisms. In one or more examples, the systems, devices, and methods include determining a first node writes application data to a memory, obtaining a data address of the memory associated with the application data, and generating an index of the data address based on hashing the data address in a hash function. In one or more examples, the systems, devices, and methods include generating a tracking entry based on the first node writing application data to the memory, storing the index and the tracking entry in a bucket of a hash table, and detecting an access violation to the application data based on the tracking entry indicating a node other than the first node modifies the application data.