Shared Memory Data Transfer Across Virtualized Operating Systems

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Solution Overview

Problem

Existing communication pathways between complex digital systems are vulnerable to performance degradation due to throughput constraints, leading to increased delays and decreased performance.

Innovation Solution

A communication infrastructure that utilizes a virtualized environment with a virtual communication bridge and shared memory region, allowing operating systems to communicate directly through a shared memory, bypassing bandwidth constraints of the communication interface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If communication is performed via a communication bridge between operating systems, then communication can be established, but bandwidth constraints and throughput limitations occur

Engineering Contradiction:
Improvecommunication capabilityVSAvoidcommunication bandwidth
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces shared memory as an intermediary communication mechanism between the virtualized operating system and host operating system. Instead of using the traditional communication bridge interface, data is transmitted through a shared memory region that both operating systems can directly access, thereby eliminating the bandwidth constraints of the communication bridge while maintaining reliable communication.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts the communication data transmission function from the constrained communication bridge interface and relocates it to shared memory. By separating the communication capability from the limited interface, the system achieves high-speed data transfer while the communication bridge remains available for control and management functions.

Inventive Principle:
Principle #2Taking out (Extraction)

2Device complexity

If traditional communication interfaces are used between virtualized systems, then system architecture is maintained, but transmission speed is limited

Engineering Contradiction:
Improvesystem architectureVSAvoidtransmission speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent transitions communication from a one-dimensional interface-based approach to a multi-dimensional approach by introducing shared memory space. This allows simultaneous access from multiple operating systems without sequential processing through a communication bridge, dramatically increasing transmission speed while preserving the virtualization architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If communication bridge interface is used, then operating systems can communicate, but delays increase due to throughput constraints

Engineering Contradiction:
Improvecommunication connectivityVSAvoidcommunication delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent enables continuous data transmission between operating systems through shared memory without the intermittent processing delays inherent in communication bridge interfaces. The shared memory allows both operating systems to read and write data simultaneously and continuously, eliminating the queuing and processing delays that occur with traditional interface-based communication.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS12504929B1Architecture to transmit data across virtualized environments via shared memory
Publication Date: 2025.12.23 CADENCE DESIGN SYST INC
  • US12504929B1 patent drawing
  • US12504929B1 patent drawing
  • US12504929B1 patent drawing

AI summary

Aspects of this technical solution can a memory device including a shared region, the shared region addressable by a first operating system of a virtualized system and addressable by a second operating system, a transmission controller of the first operating system to store a transmission to the shared region of the memory device, a notification processor of the second operating system, the notification processor to detect the transmission stored to the shared region of the memory device, and a scheduler of the second operating system to obtain the transmission via the shared memory of the memory device, and to transmit the transmission to a communication bridge.