Shared Memory Synchronization via Embedded Write Flag Toggling
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Solution Overview
Problem
Conventional shared memory synchronization methods, such as barrier synchronization and memory fences, incur significant costs and inefficiencies due to the need for multiple roundtrips to memory and idle waiting times when threads arrive at different times.
Innovation Solution
A method that uses a flag stored in each shared memory location to indicate when data is valid, allowing consumer threads to read values only after they have been written by producer threads, eliminating the need for memory fences and barriers by toggling the flag during write operations and using it to synchronize data exchange.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If barrier synchronization is used to ensure memory write completion, then data correctness is improved, but execution cost and time are worsened due to multiple memory roundtrips and thread idle waiting
Solution Approach 1:
The patent extracts the synchronization flag from a separate memory location and embeds it within the data structure itself. Each memory location contains both the actual data and an associated flag bit, eliminating the need for separate synchronization variables. This extraction reduces memory access overhead and simplifies the synchronization mechanism while maintaining data correctness.
Solution Approach 2:
The patent merges the data storage and synchronization flag into a single memory location. The flag is combined with the data value in the same memory slot, allowing simultaneous access to both the data and its synchronization state. This merging eliminates additional memory roundtrips that would be required to check separate flag variables, thereby improving execution efficiency while ensuring data correctness.
2Reliability
If memory fence is used to commit data to memory, then data visibility is improved, but memory roundtrips and execution time are worsened
Solution Approach 1:
The patent performs preliminary action by setting the synchronization flag to a known initial state (e.g., cleared) before data writing begins. Consumer threads can immediately check the flag state without requiring a prior memory fence, as the flag's initial state already provides the necessary synchronization information. This preliminary initialization eliminates the need for fence operations and reduces memory roundtrip time.
Solution Approach 2:
The patent introduces the embedded flag as an intermediary between producer and consumer threads. Instead of relying on memory fences to ensure visibility, the flag acts as a mediator that signals when data is ready for consumption. The flag's state changes provide a lightweight mechanism for achieving data visibility without the overhead of fence operations, reducing execution time while maintaining reliability.
3Reliability
If synchronization variables are used to track data readiness, then producer-consumer coordination is improved, but additional memory roundtrips and complexity are worsened
Solution Approach 1:
The patent makes the memory location universal by enabling it to serve both as data storage and as a synchronization indicator. The same memory slot that holds the actual data also contains the flag bit that signals readiness. This multi-functionality eliminates the need for separate synchronization variables and reduces overall system complexity while maintaining reliable producer-consumer coordination.
Solution Approach 2:
The patent implements self-service by enabling each memory location to automatically provide synchronization information through its embedded flag. The memory location itself serves as the synchronization mechanism, eliminating the need for external synchronization variables or complex coordination protocols. This self-service approach simplifies the overall system architecture while ensuring reliable producer-consumer coordination.
4Reliability
If threads wait at barrier until all threads arrive, then synchronization is improved, but thread idle time and total computation time are worsened
Solution Approach 1:
The patent introduces dynamics by allowing consumer threads to proceed asynchronously once the flag indicates data readiness, rather than requiring all threads to wait at a fixed barrier point. Threads can dynamically adjust their execution timing based on the flag state, enabling overlapping of producer and consumer operations. This dynamic approach maintains synchronization reliability while minimizing thread idle time and reducing total computation time.
Solution Approach 2:
The patent implements periodic action through the flag's state transitions, which periodically signal data readiness to consumer threads. Instead of continuous waiting at a barrier, consumer threads can periodically check the flag state and proceed when indicated. This periodic checking mechanism maintains proper synchronization while allowing threads to remain productive during waiting periods, thereby reducing idle time and overall computation time.
Data Source
AI summary
When communicating through shared memory, a producer thread generates a value that is written to a location in a shared memory. The value is read from the shared memory by a consumer thread. The challenge is to ensure that the consumer thread reads the location only after the value is written and is thereby synchronized. When a memory location is written by a producer thread, a flag that is simultaneously stored in the memory location along with the value is toggled. The consumer thread tracks information to determine whether the flag stored in the location indicates whether the producer has written the value to the location. The flag is read and written simultaneously with reading and writing the location in memory, thereby eliminating the need for a memory fence. After all of the consumer threads read the value, the location may be reused to write additional value(s) and simultaneously toggle the flag.