Shared NVMe Module for Dual Port ASIC Optimization
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Solution Overview
Problem
Existing NVMe dual port controllers occupy significant real estate on ASICs, leading to increased costs and inefficiencies, especially when operating in single port mode as capabilities of the second module are wasted.
Innovation Solution
Implementing a dual port NVMe controller that shares a single NVMe module with two registers between PCIe endpoints, providing the host device with the illusion of dedicated modules while maintaining all capabilities in both single and dual port modes, thus reducing the physical space and resources needed on the ASIC.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate NVMe modules are used for each port, then dedicated module resources are provided to each host device, but ASIC real estate consumption increases
Solution Approach 1:
The patent merges multiple NVMe module instances into a single shared NVMe module that serves multiple PCIe endpoints. Instead of having separate physical NVMe modules for each port, one NVMe module is shared among multiple endpoints, reducing ASIC real estate consumption while maintaining functional capabilities through virtualization and register space allocation.
Solution Approach 2:
The NVMe module is designed to be universal and multi-functional, capable of serving multiple PCIe endpoints simultaneously. The single NVMe module can be dynamically allocated to different endpoints and can handle multiple host devices, providing dedicated resource appearance to each host while sharing physical hardware resources.
2Area of stationary object
If a single NVMe module is shared between ports, then ASIC real estate is reduced, but the feeling of dedicated modules to host devices is lost
Solution Approach 1:
The patent creates virtual copies of NVMe module interfaces and register spaces for each PCIe endpoint. While there is only one physical NVMe module, each endpoint perceives a dedicated module through virtualized register spaces and interface copies, maintaining the illusion of dedicated resources without duplicating physical hardware.
Solution Approach 2:
The patent introduces an intermediary layer (the shared NVMe module with virtualization capabilities) between the PCIe endpoints and the physical hardware. This intermediary manages resource allocation and presents dedicated module appearances to each endpoint while efficiently utilizing shared physical resources.
3Reliability
If separate NVMe modules are used for each port, then dedicated capabilities are available, but costs increase
Solution Approach 1:
The patent merges multiple NVMe module functions into a single physical module, reducing the total number of components required. This consolidation lowers manufacturing costs, reduces bill of materials (BOM), and simplifies production while maintaining the functional capabilities needed for dual-port operation through resource sharing and virtualization.
4Productivity
If the second module capabilities are not used in single port mode, then resource efficiency improves, but module real estate is still occupied
Solution Approach 1:
The single NVMe module is designed to be universal and can adapt its functionality based on operating mode. In single-port mode, the module provides full capabilities to one endpoint; in dual-port mode, it can serve multiple endpoints simultaneously. This eliminates wasted real estate while maintaining resource efficiency through dynamic resource allocation.
Data Source
AI summary
The present disclosure generally relates to a non-volatile memory express (NVMe) dual port controller occupying less real estate on an application specific integrated circuit (ASIC). Rather than utilizing separate NVMe modules in the controller, with each module dedicated to a single port, the dual ports can share the same module. The host device believes that there are dedicated module resources because the module has two NVMe registers to provide the host device with the feeling that there are dedicated modules. Additionally, an interconnect between the ports and the registers contributes to providing the host device the feeling that there are dedicated modules. Furthermore, the rather than losing the capabilities of a second module when operating in single port mode, all of the capabilities of the only module are available when operating in either single port mode or dual port mode.


