Shared Output Terminal Circuit for LVDS and Single-Ended Signaling

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Solution Overview

Problem

The increase in circuit size due to the need for both low voltage differential signaling (LVDS) and single end signaling external output terminals in semiconductor devices.

Innovation Solution

A semiconductor device with a differential amplification circuit, common mode feedback circuit, and switch units that selectively output either differential or single end signals from common external output terminals, reducing the number of external terminals by using a feedback line and resistance elements to control the output mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If both LVDS external output terminals and single end signaling external output terminals are provided in the semiconductor device, then both differential signal output and single end signal output capabilities are achieved, but the number of external output terminals increases

Engineering Contradiction:
Improvesignal output capabilityVSAvoidnumber of external output terminals
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent makes the external output terminals universal by enabling them to function in both LVDS differential mode and single end signaling mode through a mode selection mechanism. The same physical terminals can be configured for different signal types based on operational requirements, eliminating the need for separate dedicated terminals for each signal type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces dynamic reconfigurability to the output terminals through mode selection signals that can switch the terminal configuration between differential and single end modes. This dynamic capability allows the terminals to adapt their function based on real-time operational needs, reducing the static requirement for multiple fixed-function terminals.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If both LVDS external output terminals and single end signaling external output terminals are provided in the semiconductor device, then both differential signal output and single end signal output capabilities are achieved, but the circuit size increases

Engineering Contradiction:
Improvesignal output capabilityVSAvoidcircuit size
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent makes the external output terminals universal by enabling them to function in both LVDS differential mode and single end signaling mode through a mode selection mechanism. The same physical terminals can be configured for different signal types based on operational requirements, eliminating the need for separate dedicated terminals for each signal type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the functionality of separate LVDS output terminals and single end signaling terminals into a single set of shared output terminals. By combining these functions and using common physical infrastructure with mode-dependent configuration, the overall circuit area is reduced while maintaining full functionality.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10033339B2Semiconductor device, semiconductor system, and control method of semiconductor device
Publication Date: 2018.07.24 RENESAS ELECTRONICS CORP
  • US10033339B2 patent drawing
  • US10033339B2 patent drawing
  • US10033339B2 patent drawing

AI summary

A semiconductor device includes a differential amplification circuit that outputs differential output signals Vo1 and Vo2, external output terminals PD1 and PD2 to which one of the differential output signals Vo1 and Vo2 and single end signals Vo3 and Vo4 is selectively supplied, switch units SW1 and SW2 that control a conduction state between the external output terminal PD1 and the feedback line and a conduction state between the external output terminal PD2 and the feedback line, respectively, resistance elements R1 and R2 respectively provided in series with the switch units SW1 and SW2, a CMFB circuit that controls a common mode voltage of the differential amplification circuit according to a difference between an intermediate voltage Vcm of the external output terminals PD1 and PD2 in the feedback line and a reference voltage Vref, and a switch unit SW3 that controls to supply a clamp voltage to the feedback line.