Shared Pad Voltage Switching for OTP Memory Programming
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing the mounting area while accommodating different driving voltages required for OTP memory operations, often necessitating separate external power terminals and increased circuit areas due to elevated withstand voltages.
Innovation Solution
A semiconductor device configuration with an internal power supply generating a regulated voltage and a switcher that allows sharing of an existing pad for external supply voltage during data writing, utilizing P-channel and N-channel MOSFET switches to manage voltage switching without suspending node voltage supply, enabling simultaneous on-states of switches without overcurrent issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate external power terminals are provided for OTP memory operations requiring different driving voltages, then the device can accommodate multiple voltage requirements, but the mounting area increases
Solution Approach 1:
The pad is designed to serve multiple functions: it acts as a data input terminal during normal operations and as an external power terminal during OTP memory programming operations. This multi-functionality eliminates the need for separate dedicated power terminals, reducing mounting area while maintaining voltage accommodation capability.
Solution Approach 2:
The patent combines the data input function and power terminal function into a single pad structure. By merging these functions, the device reduces the number of external terminals required, thereby reducing mounting area while still supporting multiple voltage requirements for different operating modes.
2Strength
If the withstand voltage of circuit blocks is raised to accommodate higher external supply voltage, then the circuit can handle higher voltages, but the circuit area increases
Solution Approach 1:
The device segments the voltage handling capability by introducing a voltage switching mechanism that directs different voltages to different circuit blocks at different times. This allows standard-voltage circuit blocks to remain standard-voltage, avoiding area increase, while still supporting high-voltage operations through temporal and functional segmentation.
Solution Approach 2:
The patent implements dynamic voltage switching that allows the circuit to adapt its voltage levels based on operational requirements. The switch controller dynamically connects or disconnects the external supply voltage to specific circuit blocks as needed, enabling voltage flexibility without requiring all circuit blocks to have elevated withstand voltage ratings.
3Area of stationary object
If voltage switching is implemented to share a pad, then the mounting area is reduced, but the complexity of voltage control increases
Solution Approach 1:
The switch controller is designed to automatically manage voltage switching based on operational mode detection. The system self-regulates by monitoring its own state and controlling the voltage switching accordingly, minimizing the need for external complex control logic while achieving effective voltage management.
4Adaptability or versatility
If a single pad is used for multiple functions, then the number of external terminals is reduced, but the control mechanism for voltage switching becomes more complex
Solution Approach 1:
The switch controller automatically detects the operational mode and controls voltage switching without requiring complex external control logic. The system self-manages the complexity by monitoring its own operational state and adjusting voltage connections accordingly, simplifying the overall control mechanism while maintaining terminal multi-functionality.
Data Source
AI summary
A semiconductor device includes, for example: an internal power supply that generates VREG from VIN; a circuit block that operates from VREG; a circuit block that operates from a node voltage Vn appearing at an internal node n1; and a switcher that switches the connection destination of the internal node n1. The switcher includes: a switch SW1 connected between an application terminal for VREG and the internal node n1; and a switch SW2 connected between an external terminal PAD and the internal node n1. The circuit block includes a switch controller configured to control the switches SW1 and SW2. The switch controller controls the switcher such that switching between a first state (SW1 on, SW2 off) and a second state (SW1 off, SW2 on) proceeds via a third state (SW1 on, SW2 on).


