Electronic Device with Shared Photonic Memory Access

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Solution Overview

Problem

In high-speed computing systems, processors and memories are grouped, leading to idle memory components when a processor stops operating, reducing efficiency as they cannot provide data access to other groups.

Innovation Solution

An electronic device design featuring a memory module with photonic components and distributed processing units, allowing access through optical communication, reducing idle memory components and enhancing data access speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If processors and memories are grouped together, then data access speed within the same group is improved, but memory components become idle when processors in the group stop operating, reducing overall system efficiency

Engineering Contradiction:
Improvedata access speedVSAvoidmemory utilization efficiency
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The memory module is designed with a universal access architecture where multiple processing units from different groups can access the same memory components through photonic components. This multi-functional access capability ensures that memory components remain utilized even when processors in a specific group are idle, as other processing units can access the memory through the photonic interconnect structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Photonic components serve as an intermediary between processing units and memory modules, enabling optical communication and data transmission. This intermediary layer allows processing units from different groups to access memory components efficiently, resolving the idle memory problem while maintaining high-speed data access through optical signals rather than traditional electrical connections.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If traditional electrical connections are used for data access, then device complexity is reduced, but data access speed and power efficiency are limited

Engineering Contradiction:
Improvedata access speedVSAvoidcommunication interface complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent replaces traditional electrical connection mechanisms with optical communication mechanisms. Photonic components enable light-based data transmission between processing units and memory modules, achieving significantly higher data access speeds and improved power efficiency. While this introduces photonic components, the overall system architecture benefits from the superior performance characteristics of optical communication compared to electrical communication.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Increases memory efficiency and computing speed by ensuring all memory components are accessible by active processing units, even when some processors are idle, with faster data access rates and reduced power loss.

Implementation Method 1

the first processing unit includes a first processing component and a second processing component configured to access different ones of the memory components through optical communication

Methodology Applied
Scientific EffectOptical communication: Light

Data Source

PatentUS20250316312A1Electronic device
Publication Date: 2025.10.09 ADVANCED SEMICON ENG INC
  • US20250316312A1 patent drawing
  • US20250316312A1 patent drawing
  • US20250316312A1 patent drawing

AI summary

An electronic device is provided. The electronic device includes a first photonic component, a memory module, and a plurality of processing units. The memory module includes a plurality of memory components supported by the first photonic component. The processing units are distributed at a periphery of the memory module, wherein the memory module is configured to be accessed by at least two of the processing units through the first photonic component.