Shared Pin Integrated Circuit for Serial Data and Interrupt Signals
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Solution Overview
Problem
The cost of packaged integrated circuits is increased by the number of pins required for interrupt and serial communication, leading to inefficiencies and performance degradation when the interrupt pin is omitted, requiring processors to poll for device status.
Innovation Solution
Integrated circuits that share a single pin for both serial data output and interrupt signal, using a combined serial data output and interrupt output terminal, which switches between serial data and interrupt output based on a chip select signal, reducing the pin count and maintaining interrupt functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate terminals are used for serial data output and interrupt output, then both functions can be provided independently, but the number of pins increases leading to larger package size
Solution Approach 1:
The patent combines the serial data output terminal and interrupt output terminal into a single shared terminal. The output circuit selectively connects this shared terminal to either the serial data output or the interrupt output based on the state of the chip select signal, allowing both functions to be provided through one pin rather than requiring separate pins for each function.
Solution Approach 2:
The patent implements dynamic switching of the terminal function based on the chip select signal state. When the chip select signal is active, the terminal functions as a serial data output; when inactive, it functions as an interrupt output. This dynamic reconfiguration allows the same physical terminal to serve different logical functions at different times.
2Area of stationary object
If a dedicated interrupt pin is omitted to reduce pin count, then package size decreases, but the processor must poll for device status wasting processor cycles
Solution Approach 1:
The patent merges the interrupt output function with the serial data output terminal, eliminating the need for a separate dedicated interrupt pin. The output circuit selectively activates the interrupt signal on the shared terminal when the chip select signal is inactive, allowing the processor to receive interrupt notifications without requiring additional pins or engaging in continuous polling.
3Reliability
If more pins are used for communication functions, then communication reliability is improved, but the manufacturing cost increases
Solution Approach 1:
The patent reduces the number of required pins by combining serial data output and interrupt output functions into a single terminal. This reduction in pin count directly lowers manufacturing costs associated with packaging and interconnections, while the selective switching mechanism ensures that both communication functions remain reliable and functional.
4Speed
If the terminal is continuously used for serial data output, then serial communication is maintained, but interrupt signals cannot be provided simultaneously
Solution Approach 1:
The patent uses periodic switching based on the chip select signal to alternate between serial data output mode and interrupt output mode. When serial communication is active (chip select asserted), the terminal provides serial data; when communication is inactive (chip select deasserted), the terminal switches to provide interrupt signals. This periodic reconfiguration ensures both functions operate reliably without interference.
Data Source
AI summary
An integrated circuit includes a combined serial data output and interrupt output terminal, a serial communication control circuit; an interrupt generation circuit, and an output circuit. The output circuit includes a serial data input, an interrupt input, and a combined serial data and interrupt output. The serial data input is coupled to a serial data output of the serial communication circuit. The interrupt input is coupled to an interrupt output of the interrupt generation circuit. The combined serial data and interrupt output is coupled to the combined serial data output and interrupt output terminal.