Solid-state imaging device shared pixel structure noise reduction
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Solution Overview
Problem
Existing solid-state imaging devices face challenges in achieving both low noise and high frame rate, as reducing pixel size increases random noise from amplifying transistors and limits signal processing speed in pixel sharing structures.
Innovation Solution
The solution involves arranging pixels in a vertical direction to share an amplifying portion, with the length of the amplifying portion's area set to be greater than one pixel but less than two pixels in a direction intersecting the signal line, allowing for increased gate length and reduced noise while maintaining high frame rates by optimizing transistor placement and signal processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If pixel size is reduced to increase pixel density, then the number of pixels per unit area increases, but random noise from amplifying transistors increases and signal processing speed is limited
Solution Approach 1:
Multiple pixels (specifically four pixels arranged in 2x2) share a common amplifying transistor, allowing the amplifying transistor's gate length to be extended beyond the pixel pitch. This merging approach enables the amplifying transistor to process signals from multiple pixels simultaneously, reducing random noise while maintaining high pixel density.
Solution Approach 2:
The shared amplifying transistor serves multiple functions by amplifying signals from multiple different pixels. This multi-functional design allows a single amplifying transistor to replace what would traditionally require multiple separate amplifying transistors, reducing overall transistor count and enabling larger gate lengths for noise reduction.
2Quantity of substance
If pixel size is reduced to increase pixel density, then the number of pixels per unit area increases, but signal processing speed is limited in pixel sharing structures
Solution Approach 1:
The patent arranges pixels and signal lines in specific spatial dimensions to optimize processing. By configuring four pixels in a 2x2 arrangement with signal lines extending in orthogonal directions, the design enables parallel signal processing paths that maintain high processing speed despite pixel sharing.
Solution Approach 2:
The pixel array is segmented into multiple independent pixel sharing units, each with its own signal processing path. This segmentation allows simultaneous processing of signals from different pixel groups, maintaining overall signal processing speed while enabling noise reduction through sharing within each unit.
3Area of stationary object
If gate length of amplifying transistor is shortened to fit within pixel pitch, then pixel size is reduced, but random noise increases
Solution Approach 1:
By merging multiple pixels into a single pixel sharing unit that shares the amplifying transistor, the design extends the available space for the amplifying transistor beyond the individual pixel pitch. This allows the gate length to be increased while maintaining compact pixel dimensions.
Solution Approach 2:
The patent employs a flexible layout where the amplifying transistor can be positioned optimally within the pixel sharing unit, and the gate length can be dynamically adjusted based on the available space from multiple pixels. This dynamic arrangement enables longer gate lengths without increasing overall pixel size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces 1/f noise and random noise, enabling improved image quality and higher frame rates by enhancing the signal processing speed and sensitivity of the imaging device.
Implementation Method 1
pixels each of which has a photoelectric conversion portion that senses light and converts the sensed light into a charge
Data Source
AI summary
A solid-state imaging device includes pixels each of which has a photoelectric conversion portion that senses light and converts the sensed light into a charge; and an amplifying portion which is shared by a predetermined number of the pixels, amplifies the generated charge in the photoelectric conversion portion, and outputs a level of signal corresponding to the charge, wherein the a predetermined number of the pixels which share the amplifying portion are arranged in a first direction extending along a signal line via which the amplifying portion outputs the signal, and wherein a length of an area where the amplifying portion is formed along a second direction substantially intersecting the first direction is set to be equal to or more than a length of one pixel and to be less than a length of two pixels in the second direction.