Shared-Pixel Image Sensor Layout for Parasitic Capacitance Isolation
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Solution Overview
Problem
As image sensors integrate more pixels, the size of each pixel decreases, leading to challenges in maintaining electrical characteristics due to parasitic capacitance between source follower gates in shared pixel structures.
Innovation Solution
The implementation of a contact barrier structure between shared pixels, which overlaps the trench isolation structure vertically, helps restrict parasitic capacitance by applying a voltage and electrically connecting the contact barriers to protection diodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If pixel size is decreased to increase integration level, then more pixels can be integrated, but parasitic capacitance between source follower gates increases
Solution Approach 1:
A contact barrier structure is introduced as an intermediary element between adjacent shared pixels. This contact barrier, electrically connected to protection diodes, acts as a mediator to block parasitic capacitance coupling between source follower gates of neighboring pixels while allowing the high integration layout to be maintained.
Solution Approach 2:
The pixel array is segmented into shared pixel units separated by trench isolation structures. Each shared pixel contains multiple unit pixels that share common transistors, and the segmentation is further enhanced by contact barrier structures that divide the electrical isolation between adjacent shared pixels, preventing parasitic capacitance accumulation.
2Reliability
If shared pixel structure is used to increase photodiode area, then pixel sensitivity improves, but parasitic capacitance between adjacent pixels increases
Solution Approach 1:
Contact barrier structures serve as intermediary elements between adjacent shared pixels, electrically isolating the source follower gates of neighboring pixels. This mediation prevents parasitic capacitance formation while preserving the shared pixel structure that enhances photodiode area and sensitivity.
Solution Approach 2:
The contact barrier structures are strategically placed at specific locations where parasitic capacitance would form between adjacent shared pixels. This localized isolation approach maintains the beneficial shared pixel structure in regions where it improves sensitivity while applying isolation only where parasitic capacitance would occur.
3Productivity
If pixel size is decreased, then integration density increases, but electrical characteristics deteriorate due to parasitic capacitance
Solution Approach 1:
Contact barrier structures act as intermediary isolation elements that enable high integration density by allowing compact pixel arrangement while simultaneously protecting electrical characteristics by blocking parasitic capacitance paths between adjacent pixels.
Solution Approach 2:
The isolation approach extends into the vertical dimension with trench isolation structures that extend deep into the substrate, and contact barrier structures that overlap these trenches. This multi-dimensional isolation strategy effectively blocks parasitic capacitance while maintaining horizontal integration density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents the generation of parasitic capacitance, thereby improving the electrical characteristics of the image sensor and reducing plasma-induced damage during manufacturing.
Implementation Method 1
parasitic capacitance between source follower gates in shared pixel structures
Implementation Method 2
reducing plasma-induced damage during manufacturing
Data Source
AI summary
An image sensor includes a substrate including a pixel region, a through electrode region, and a power supply region between the pixel region and the through electrode region, through electrodes in the through electrode region, shared pixels separated from each other by a first trench isolation structure in the pixel region and each shared pixel including unit pixels, wherein the first trench isolation structure extends in the substrate in a vertical direction, contact barriers arranged between the shared pixels and vertically overlapping the first trench isolation structure, and a protection diode arranged in the power supply region, including a first impurity region where first power is supplied by any one of the through electrodes, and electrically connected to the contact barriers.