Shared Power Rail Layout for Multi-Voltage Standard Cells
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Solution Overview
Problem
There is a need to reduce the area of ICs such as SoCs used in mobile devices while improving their performance, which requires an efficient design of semiconductor circuit layouts to accommodate all necessary semiconductor elements.
Innovation Solution
The semiconductor device incorporates a specific power rail configuration on a semiconductor substrate, including first, second, and third power rails, a single fourth power rail, and a shared well for multiple cells, allowing for different voltage levels to be applied to various components, thereby optimizing space and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple power rails with different voltages are provided for each cell, then each cell can operate with optimal voltage levels, but the device area increases due to duplicated power rail structures
Solution Approach 1:
Multiple cells share a single fourth power rail instead of each cell having its own separate power rail. This merging of power rail resources reduces the overall device area while still providing the necessary third voltage to multiple cells, thereby resolving the contradiction between device area and cell performance.
Solution Approach 2:
The single fourth power rail serves multiple cells simultaneously, making it a universal power supply structure. This multi-functional power rail provides the third voltage to all connected cells, eliminating the need for duplicated power rail structures and reducing device area while maintaining optimal voltage levels for each cell.
2Reliability
If dummy regions are added to accommodate power rail structures, then voltage distribution is improved, but the device area increases
Solution Approach 1:
The invention merges the power rail structure with the active cell regions, eliminating the need for separate dummy regions. The single fourth power rail is positioned to serve multiple cells directly, integrating the power distribution function into the active device area rather than requiring additional dummy regions, thus maintaining good voltage distribution without increasing device area.
3Measurement precision
If separate power rails are provided for each cell, then voltage control precision is improved, but device complexity increases
Solution Approach 1:
The invention combines multiple power rail functions into a single fourth power rail that serves multiple cells. This merging reduces device complexity by eliminating duplicated power rail structures while maintaining precise voltage control through centralized management of the third voltage supply to all connected cells.
Data Source
AI summary
A semiconductor device includes first, second, and third power rails extending in a first direction on a substrate and sequentially spaced apart in a second direction intersecting the first direction. A fourth power rail extends in the first direction on the substrate between the first and third power rails. A first well of a first conductive type is displaced inside the substrate between the first and third power rails. Cells are continuously displaced between the first and third power rails and share the first well. The first and third power rails are provided with a first voltage, the second power rail is provided with a second voltage different from the first voltage, the fourth power rail is provided with a third voltage different from the first voltage and the second voltage, and the cells are provided with the third voltage from the fourth power rail.