Shared Pre-fetch Memory for Parallel Video Processing

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Solution Overview

Problem

In moving-picture processing apparatuses, the existing use of multiple pre-fetch memories for storing reference pictures leads to increased data transfer between external and pre-fetch memories, and inefficient reading of image data, particularly in MPEG encoders and decoders that perform parallel processing of macroblock lines.

Innovation Solution

Implementing a shared pre-fetch memory architecture where encoding or decoding units can perform parallel processing of adjacent macroblock lines, reducing the vertical size of pre-fetch areas and memory requirements, and optimizing data transfer by allowing a single pre-fetch memory to serve multiple units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple pre-fetch memories are provided for parallel processing, then processing speed is improved, but memory volume and data transfer amount increase

Engineering Contradiction:
Improveprocessing speedVSAvoidmemory volume
Core Design Contradiction:
ProductivityVSVolume of stationary object

Solution Approach 1:

The patent merges multiple pre-fetch memory functions into a single shared pre-fetch memory that serves multiple encoding/decoding units. The memory is time-division multiplexed to store reference picture portions for different units sequentially, eliminating the need for separate pre-fetch memories while maintaining parallel processing capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single pre-fetch memory is designed to perform multiple functions by serving different encoding/decoding units at different time slots. It can store reference picture portions for various units and update them in a cyclic manner, making the memory universal rather than dedicated to a single unit.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple pre-fetch memories are provided for parallel processing, then processing speed is improved, but data transfer amount increases

Engineering Contradiction:
Improveprocessing speedVSAvoiddata transfer amount
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

By combining multiple pre-fetch memory operations into a single shared memory, the patent reduces redundant data transfers. The external memory writes to the shared pre-fetch memory once per time slot, and multiple units read from it sequentially, eliminating multiple separate write operations that would occur with dedicated memories.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system performs preliminary pre-fetching of reference picture portions into the shared memory before they are needed by the encoding/decoding units. This advance preparation allows multiple units to access the data without requiring multiple separate pre-fetch operations from external memory.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If dedicated pre-fetch memories are provided for each unit, then reading efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvereading efficiencyVSAvoiddevice complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent combines multiple dedicated pre-fetch memories into a single shared memory unit with time-division multiplexing control. While the physical structure is simplified, control logic manages time-sliced access to maintain reading efficiency for multiple units without requiring separate memory modules.

Inventive Principle:
Principle #5Merging (Combining)

4Volume of stationary object

If a shared pre-fetch memory is used, then memory volume is reduced, but access conflict may occur

Engineering Contradiction:
Improvememory volumeVSAvoidaccess reliability
Core Design Contradiction:
Volume of stationary objectVSReliability

Solution Approach 1:

The system implements periodic time-division multiplexing where the shared pre-fetch memory is allocated to different encoding/decoding units in sequential time slots. Each unit receives dedicated access during its assigned slot, eliminating access conflicts while maintaining the benefits of a single memory structure.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS8731044B2Moving-picture processing apparatus
Publication Date: 2014.05.20 FUJITSU LTD
  • US8731044B2 patent drawing
  • US8731044B2 patent drawing
  • US8731044B2 patent drawing

AI summary

A moving-picture processing apparatus includes a plurality of decoding or encoding units, and a pre-fetch memory shared by the plurality of decoding or encoding units.